summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2019-08-25 05:22:36 +0000
committerCraig Topper <craig.topper@intel.com>2019-08-25 05:22:36 +0000
commit6e2776c9c4045e0a40c3d260aafa7856701607d8 (patch)
treeab665e2294caef71d294f5231f676480e991d31f
parent894b8d1d85a13fe106411c996e26e571c00dbb78 (diff)
downloadbcm5719-llvm-6e2776c9c4045e0a40c3d260aafa7856701607d8.tar.gz
bcm5719-llvm-6e2776c9c4045e0a40c3d260aafa7856701607d8.zip
[X86] Add test cases for PR42998. NFC
llvm-svn: 369862
-rw-r--r--llvm/test/CodeGen/X86/pr42998.ll73
1 files changed, 73 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/pr42998.ll b/llvm/test/CodeGen/X86/pr42998.ll
new file mode 100644
index 00000000000..6d67417286a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr42998.ll
@@ -0,0 +1,73 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,FAST-INCDEC
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SLOW-INCDEC
+
+define i64 @imm1_Oz(i32 %x, i32 %y) minsize nounwind {
+; CHECK-LABEL: imm1_Oz:
+; CHECK: # %bb.0:
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: pushq $1
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: leal (%rdi,%rax), %ecx
+; CHECK-NEXT: addl %esi, %eax
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %x1 = add i32 %x, 1
+ %y1 = add i32 %y, 1
+ %x1z = zext i32 %x1 to i64
+ %y1z = zext i32 %y1 to i64
+ %r = add i64 %x1z, %y1z
+ ret i64 %r
+}
+
+define i64 @imm1_Os(i32 %x, i32 %y) optsize nounwind {
+; FAST-INCDEC-LABEL: imm1_Os:
+; FAST-INCDEC: # %bb.0:
+; FAST-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
+; FAST-INCDEC-NEXT: movl $1, %eax
+; FAST-INCDEC-NEXT: leal (%rdi,%rax), %ecx
+; FAST-INCDEC-NEXT: addl %esi, %eax
+; FAST-INCDEC-NEXT: addq %rcx, %rax
+; FAST-INCDEC-NEXT: retq
+;
+; SLOW-INCDEC-LABEL: imm1_Os:
+; SLOW-INCDEC: # %bb.0:
+; SLOW-INCDEC-NEXT: movl $1, %eax
+; SLOW-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
+; SLOW-INCDEC-NEXT: leal (%rdi,%rax), %ecx
+; SLOW-INCDEC-NEXT: addl %esi, %eax
+; SLOW-INCDEC-NEXT: addq %rcx, %rax
+; SLOW-INCDEC-NEXT: retq
+ %x1 = add i32 %x, 1
+ %y1 = add i32 %y, 1
+ %x1z = zext i32 %x1 to i64
+ %y1z = zext i32 %y1 to i64
+ %r = add i64 %x1z, %y1z
+ ret i64 %r
+}
+
+define i64 @imm1_O2(i32 %x, i32 %y) nounwind {
+; FAST-INCDEC-LABEL: imm1_O2:
+; FAST-INCDEC: # %bb.0:
+; FAST-INCDEC-NEXT: # kill: def $esi killed $esi def $rsi
+; FAST-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
+; FAST-INCDEC-NEXT: leal 1(%rdi), %eax
+; FAST-INCDEC-NEXT: incl %esi
+; FAST-INCDEC-NEXT: addq %rsi, %rax
+; FAST-INCDEC-NEXT: retq
+;
+; SLOW-INCDEC-LABEL: imm1_O2:
+; SLOW-INCDEC: # %bb.0:
+; SLOW-INCDEC-NEXT: # kill: def $esi killed $esi def $rsi
+; SLOW-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
+; SLOW-INCDEC-NEXT: leal 1(%rdi), %eax
+; SLOW-INCDEC-NEXT: addl $1, %esi
+; SLOW-INCDEC-NEXT: addq %rsi, %rax
+; SLOW-INCDEC-NEXT: retq
+ %x1 = add i32 %x, 1
+ %y1 = add i32 %y, 1
+ %x1z = zext i32 %x1 to i64
+ %y1z = zext i32 %y1 to i64
+ %r = add i64 %x1z, %y1z
+ ret i64 %r
+}
OpenPOWER on IntegriCloud