| Commit message (Collapse) | Author | Age | Files | Lines |
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an additional conversion (other than a qualification conversion) would be
required after the explicit conversion.
Conversely, do allow explicit conversion functions to be used when initializing
a temporary for a reference binding in direct-list-initialization.
llvm-svn: 191150
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this is required to ignore interceptors when called from the module
llvm-svn: 191149
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llvm-svn: 191148
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llvm-svn: 191147
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rather than a post-processing action, so we can support inserting these checks
at stages other than the end of the initialization. No functionality change
intended.
llvm-svn: 191146
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(iterator,
iterator, allocator) constructor with the intention of it being
implicitly converted to the allocator type, it is possible for overload
resolution to favour the (iterator, iterator, enable_if) constructor.
Eliminate this possibility by moving the enable_if to one of the
existing arguments and removing the third argument.
llvm-svn: 191145
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llvm-svn: 191144
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SROA wants to convert any types of equivalent widths but it's not possible to
convert vectors of pointers to an integer scalar with a single cast. As a
workaround we add a bitcast to the corresponding int ptr type first. This type
of cast used to be an edge case but has become common with SLP vectorization.
Fixes PR17271.
llvm-svn: 191143
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existing tests confirm that it does. c++1y status page now showing libc++ is complete for c++1y modulo dynarray issues.
llvm-svn: 191142
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status page up to date.
llvm-svn: 191141
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llvm-svn: 191140
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Before:
size = sizeof * a;
After:
size = sizeof *a;
llvm-svn: 191139
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splitting too."
This reverts commit r191130.
llvm-svn: 191138
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Copy and paste error in r190935..
llvm-svn: 191137
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llvm-svn: 191136
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llvm-svn: 191135
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Allow binutils .type and .section directives to take the following
forms:
- @<type>
- %<type>
- "<type>"
llvm-svn: 191134
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llvm-svn: 191133
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see the comment in code
llvm-svn: 191132
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In AVX 256bit vectors are valid vectors and therefore the Type Legalizer doesn't
split the VSELECT and SETCC nodes. AVX only supports MIN/MAX on 128bit vectors
and this fix enables vector splitting for this special case in the X86 DAG
Combiner.
This fix is related to PR16695, PR17002, and <rdar://problem/14594431>.
llvm-svn: 191131
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The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask for the given target. This mask has usually
te same size as the VSELECT return type (except for Intel KNL). Now the type
legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
llvm-svn: 191130
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llvm-svn: 191129
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This can revert r191087.
llvm-svn: 191128
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llvm-svn: 191127
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llvm-svn: 191126
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llvm-svn: 191125
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A patch to AllocateTarget function to recognize llvm::Triple::NaCl for
MIPSEL and return NaClTargetInfo. Additional test has been added to check
if the expected macros get defined.
llvm-svn: 191124
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Reapply r191108 with a fix for a memory corruption error I introduced. Of
course, we can't reference the scalars that we replace by vectorizing and then
call their eraseFromParent method. I only 'needed' the scalars to get the
DebugLoc. Just store the DebugLoc before actually vectorizing instead. As a nice
side effect, this also simplifies the interface between BoUpSLP and the
HorizontalReduction class to returning a value pointer (the vectorized tree
root).
radar://14607682
llvm-svn: 191123
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sure that the functions 'abs' or 'round' are the functions from libm.
rdar://15012650
llvm-svn: 191122
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This reverts commit r191108.
The horizontal.ll test case fails under libgmalloc. Thanks Shuxin for pointing
this out to me.
llvm-svn: 191121
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PR17300.
llvm-svn: 191120
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info finalization to greatly reduce the number of fixups that the
assembler has to handle in order to improve compile time.
llvm-svn: 191119
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PR17307 & 17308.
The problem of r191017 is that when GVN fabricate a val-number for a dead instruction (in order
to make following expr-PRE happy), it forget to fabricate a leader-table entry for it as well.
llvm-svn: 191118
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Clean up some simple code quality issues. Bring internal naming
conventions up to current standard, fix inconsistent formatting, and
tidy up a couple of odd contructs.
llvm-svn: 191117
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llvm-svn: 191116
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llvm-svn: 191115
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anyway).
llvm-svn: 191114
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to further work.
llvm-svn: 191113
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llvm-svn: 191112
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Patch by Dimitry Andric
llvm-svn: 191111
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breakpoint isn't valid for the current thread but specify should stop to false. Also remove selecting a thread on a breakpoint hit.
llvm-svn: 191110
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I cannot think of a test case that reliably triggers this bug.
llvm-svn: 191109
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Match reductions starting at binary operation feeding into a phi. The code
handles trees like
r += v1 + v2 + v3 ...
and
r += v1
r += v2
...
and
r *= v1 + v2 + ...
We currently only handle associative operations (add, fadd fast).
The code can now also handle reductions feeding into stores.
a[i] = v1 + v2 + v3 + ...
The code is currently disabled behind the flag "-slp-vectorize-hor". The cost
model for most architectures is not there yet.
I found one opportunity of a horizontal reduction feeding a phi in TSVC
(LoopRerolling-flt) and there are several opportunities where reductions feed
into stores.
radar://14607682
llvm-svn: 191108
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is no need to go through the driver indirection here, and it clutters
things up as dependencies can sneak in for specific things the driver is
doing.
llvm-svn: 191107
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llvm-svn: 191106
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llvm-svn: 191105
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llvm-svn: 191104
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so the Index in/out parameters are pointless (always passed in as 0, always
ignored by the caller).
llvm-svn: 191103
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Specifically, allows the unwinder to handle the case where sc.function
gets resolved with a pc that is one past the address range of the function
(consistent with a tail call). However, there is no matching symbol.
Adds eSymbolContextTailCall to provide callers with control over the scope
of symbol resolution and to allow ResolveSymbolContextForAddress to handle
tail calls since this routine is common to unwind and disassembly.
llvm-svn: 191102
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with the closest available 32-bit floating point representation.
llvm-svn: 191101
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