summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* [DAG] Teach findBaseOffset to interpret indexes of indexed memory operationsNirav Dave2018-01-263-12/+37
| | | | | | Indexed outputs are addition / subtractions and can be interpreted as such. llvm-svn: 323539
* [AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe)Dmitry Preobrazhensky2018-01-263-0/+145
| | | | | | | | | See bug 36000: https://bugs.llvm.org/show_bug.cgi?id=36000 Differential Revision: https://reviews.llvm.org/D42483 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 323538
* gmodules XFAIL two more tests that only fail for android (pr36109)Pavel Labath2018-01-262-0/+2
| | | | llvm-svn: 323537
* [MIPS] Don't crash on unsized extern types with -mgpoptAlexander Richardson2018-01-262-0/+29
| | | | | | | | | | | | | | Summary: This fixes an assertion when building the FreeBSD MIPS64 kernel. Reviewers: atanasyan, sdardis, emaste Reviewed By: sdardis Subscribers: krytarowski, llvm-commits Differential Revision: https://reviews.llvm.org/D42571 llvm-svn: 323536
* [DAGCombine] reduceBuildVecToShuffle - ensure EXTRACT_VECTOR_ELT index is in ↵Simon Pilgrim2018-01-262-1/+20
| | | | | | | | range From OSS Fuzz Test Case #5688 llvm-svn: 323535
* [AMDGPU][MC] Added support of 64-bit image atomicsDmitry Preobrazhensky2018-01-267-36/+166
| | | | | | | | | See bug 35998: https://bugs.llvm.org/show_bug.cgi?id=35998 Differential Revision: https://reviews.llvm.org/D42469 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 323534
* [SLP] Removed the warning about unused variable, NFC.Alexey Bataev2018-01-261-1/+1
| | | | llvm-svn: 323533
* clang-format: [JS] Prevent ASI before [ and (.Martin Probst2018-01-262-3/+8
| | | | | | | | | | | | | | | Summary: JavaScript automatic semicolon insertion can trigger before [ and (, so avoid breaking before them if the previous token is likely to terminate an expression. Reviewers: djasper Subscribers: cfe-commits, klimek Differential Revision: https://reviews.llvm.org/D42570 llvm-svn: 323532
* [X86][SSE] Add tests for vector truncation with PACKUS style signed saturationSimon Pilgrim2018-01-261-0/+3315
| | | | | | PACKUS - truncates signed value, saturating to [0,unsigned_max_trunc] llvm-svn: 323531
* [SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle.Alexey Bataev2018-01-264-155/+393
| | | | | | | | | | | | | | | | | Summary: If the same value is going to be vectorized several times in the same tree entry, this entry is considered to be a gather entry and cost of this gather is counter as cost of InsertElementInstrs for each gathered value. But we can consider these elements as ShuffleInstr with SK_PermuteSingle shuffle kind. Reviewers: spatel, RKSimon, mkuper, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38697 llvm-svn: 323530
* [OMPT] Use fuzzy return addresses in lock testcasesJonas Hahnfeld2018-01-264-71/+71
| | | | | | | | | | | Use fuzzy return addresses in lock testcases so that these testcases can also be run using the Intel Compiler. Patch by Simon Convent! Differential Revision: https://reviews.llvm.org/D41896 llvm-svn: 323529
* [AST] Use bit packing to reduce sizeof(TypedefNameDecl) from 88 to 80.Benjamin Kramer2018-01-262-20/+21
| | | | | | | | We can stash the cached transparent tag bit in existing pointer padding. Everything coming out of ASTContext is always aligned to a multiple of 8, so we have 8 spare bits. llvm-svn: 323528
* [AMDGPU][MC] Enabled disassembler for image atomic operationsDmitry Preobrazhensky2018-01-262-12/+48
| | | | | | | | | See bug 35988: https://bugs.llvm.org/show_bug.cgi?id=35988 Differential Revision: https://reviews.llvm.org/D42186 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 323527
* [X86] Cleanup SDLoc arguments as mentioned on D42544Simon Pilgrim2018-01-261-6/+7
| | | | llvm-svn: 323526
* [TableGen][NFC]Remove dead variable.Clement Courbet2018-01-261-1/+0
| | | | llvm-svn: 323525
* [ASTImporter] avoid warnings: unused var, switch coveredSam McCall2018-01-262-8/+6
| | | | llvm-svn: 323524
* [OpenCL] Add "cles_khr_int64" extension.Alexey Bader2018-01-262-0/+12
| | | | | | | | | | | | | | | | | | | Summary: For OpenCL 1.1 embedded profile 64 bit integers i.e. long, ulong including the appropriate vector data types and operations on 64-bit integers are optional. The "cles_khr_int64" extension string will be reported if the embedded profile implementation supports 64-bit integers. Reviewers: Anastasia, bader Reviewed By: Anastasia, bader Subscribers: bader, yaxunl, Anastasia, cfe-commits Differential Revision: https://reviews.llvm.org/D42532 llvm-svn: 323522
* [MIR] Add support for addrspace in MIRFrancis Visoiu Mistrih2018-01-269-9/+60
| | | | | | | | | | Add support for printing / parsing the addrspace of a MachineMemOperand. Fixes PR35970. Differential Revision: https://reviews.llvm.org/D42502 llvm-svn: 323521
* Fix linux fallout from c++ gmodules enablePavel Labath2018-01-262-2/+5
| | | | | | | | | | | TestLibcxxListLoop - fails because the evil "define private public" trick does not work with gmodules. The purpose of the test is not to test debug info parsing so I just mark it as no_debug_info_testcase. In the long term it may be interesting to write a mock std::list which will allow us to test bad inputs to data formatters more easily. TestGModules - seems to be a genuine bug. Filed pr36107 and xfailed. llvm-svn: 323520
* [ASTImporter] Support LambdaExprs and improve template supportAleksei Sidorin2018-01-2613-87/+435
| | | | | | | | | | | | | | Also, a number of style and bug fixes was done: * ASTImporterTest: added sanity check for source node * ExternalASTMerger: better lookup for template specializations * ASTImporter: don't add templated declarations into DeclContext * ASTImporter: introduce a helper, ImportTemplateArgumentListInfo getting SourceLocations * ASTImporter: proper set ParmVarDecls for imported FunctionProtoTypeLoc Differential Revision: https://reviews.llvm.org/D42301 llvm-svn: 323519
* [clangd] Fix GCC build break 'declaration changes meaning'Sam McCall2018-01-261-4/+4
| | | | llvm-svn: 323518
* [Tooling] Test more APIs of ToolExecutor. NFC.Eric Liu2018-01-261-3/+8
| | | | llvm-svn: 323517
* [AMDGPU] fix LDS f32 intrinsicsDaniil Fukalov2018-01-265-45/+48
| | | | | | | | | | | | - using qualified pointer addrspace in intrinsics class to avoid .f32 mangling - changed too common atomic mangling to ds - added missing intrinsics to AMDGPUTTIImpl::getTgtMemIntrinsic Reviewed by: b-sumner Differential Revision: https://reviews.llvm.org/D42383 llvm-svn: 323516
* [CallSiteSplitting] Fix infinite loop when recording conditions.Florian Hahn2018-01-262-1/+26
| | | | | | | | | Fix infinite loop when recording conditions by correctly marking basic blocks as visited. Fixes https://bugs.llvm.org/show_bug.cgi?id=36105 llvm-svn: 323515
* [ARM] Accept a subset of Thumb GPR register class when emitting an SP-relativeMomchil Velikov2018-01-262-2/+27
| | | | | | | | | | | | | load instruction The function `Thumb1InstrInfo::loadRegFromStackSlot` accepts only the `tGPR` register class. The function serves to emit a `tLDRspi` instruction and certainly any subset of the `tGPR` register class is a valid destination of the load. Differential revision: https://reviews.llvm.org/D42535 llvm-svn: 323514
* [X86FixupBWInsts] Prefer positive checks in the test. NFCAndrei Elovikov2018-01-261-1/+1
| | | | | | | | | | | | Reviewers: andrew.w.kaylor, craig.topper, MatzeB Reviewed By: andrew.w.kaylor Subscribers: aivchenk, llvm-commits Differential Revision: https://reviews.llvm.org/D42531 llvm-svn: 323513
* [ARM] Armv8.2-A FP16 code generation (part 1/3)Sjoerd Meijer2018-01-2611-29/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the groundwork for Armv8.2-A FP16 code generation . Clang passes and returns _Float16 values as floats, together with the required bitconverts and truncs etc. to implement correct AAPCS behaviour, see D42318. We will implement half-precision argument passing/returning lowering in the ARM backend soon, but for now this means that this: _Float16 sub(_Float16 a, _Float16 b) { return a + b; } gets lowered to this: define float @sub(float %a.coerce, float %b.coerce) { entry: %0 = bitcast float %a.coerce to i32 %tmp.0.extract.trunc = trunc i32 %0 to i16 %1 = bitcast i16 %tmp.0.extract.trunc to half <SNIP> %add = fadd half %1, %3 <SNIP> } When FullFP16 is *not* supported, we don't make f16 a legal type, and we get legalization for "free", i.e. nothing changes and everything works as before. And also f16 argument passing/returning is handled. When FullFP16 is supported, we do make f16 a legal type, and have 2 places that we need to patch up: f16 argument passing and returning, which involves minor tweaks to avoid unnecessary code generation for some bitcasts. As a "demonstrator" that this works for the different FP16, FullFP16, softfp modes, etc., I've added match rules to the VSUB instruction description showing that we can codegen this instruction from IR, but more importantly, also to some conversion instructions. These conversions were causing issue before in the FP16 and FullFP16 cases. I've also added match rules to the VLDRH and VSTRH desriptions, so that we can actually compile the entire half-precision sub code example above. This showed that these loads and stores had the wrong addressing mode specified: AddrMode5 instead of AddrMode5FP16, which turned out not be implemented at all, so that has also been added. This is the minimal patch that shows all the different moving parts. In patch 2/3 I will add some efficient lowering of bitcasts, and in 2/3 I will add the remaining Armv8.2-A FP16 instruction descriptions. Thanks to Sam Parker and Oliver Stannard for their help and reviews! Differential Revision: https://reviews.llvm.org/D38315 llvm-svn: 323512
* [clangd] Modify the Span API so that Spans propagate with contexts.Sam McCall2018-01-266-68/+102
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This is probably the right behavior for distributed tracers, and makes unpaired begin-end events impossible without requiring Spans to be bound to a thread. The API is conceptually clean but syntactically awkward. As discussed offline, this is basically a naming problem and will go away if (when) we use TLS to store the current context. The apparently-unrelated change to onScopeExit are because its move semantics broken if Func is POD-like since r322838. This is true of function pointers, and the lambda I use here that captures two pointers only. I've raised this issue on llvm-dev and will revert this part if we fix it in some other way. Reviewers: ilya-biryukov Subscribers: klimek, jkorous-apple, ioeric, cfe-commits Differential Revision: https://reviews.llvm.org/D42499 llvm-svn: 323511
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-261-1/+1
| | | | | | "in in" -> "in", "on on" -> "on" etc. llvm-svn: 323510
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-269-9/+9
| | | | | | "in in" -> "in", "on on" -> "on" etc. llvm-svn: 323509
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-2623-24/+24
| | | | | | "in in" -> "in", "on on" -> "on" etc. llvm-svn: 323508
* [RISCV] Encode RISCV specific ELF e_flags to RISCV Binary by RISCVTargetStreamerShiva Chen2018-01-267-0/+130
| | | | llvm-svn: 323507
* [X86] Remove dead code from LowerBUILD_VECTOR that tried to handle i64 ↵Craig Topper2018-01-261-21/+0
| | | | | | | | element type in 32-bit mode. Type legalization would prevent any i64 operands to the build_vector from existing before we get here. The coverage bots show this code as uncovered. llvm-svn: 323506
* [SelectionDAG] Replace a std::vector<SDValue> with a SmallVector.Craig Topper2018-01-261-1/+1
| | | | | | It likely the number of elements in the type we're legalizing here is reasonably small. llvm-svn: 323505
* [X86] Remove code from combineBitcastvxi1 that was needed to support the ↵Craig Topper2018-01-261-47/+0
| | | | | | | | previous native IR for kunpck intrinsics. The original autoupgrade for kunpck intrinsics used a bitcasted scalar shift, or, and. This combine would turn this into a concat_vectors. Now the kunpck intrinsics are autoupgraded to a vector shuffle that will become a concat_vectors. llvm-svn: 323504
* [X86] Remove unused intrinsic type handling. NFCCraig Topper2018-01-262-28/+2
| | | | llvm-svn: 323503
* [X86] Simplify condition in VSETCC. NFCCraig Topper2018-01-261-2/+1
| | | | | | This listed all legal 128-bit integer types individually, but since we already know we have a legal type and its integer, we can just check is128BitVector. llvm-svn: 323502
* [X86] Remove LowerVSETCC code for handling vXi1 setcc with vXi8/vXi16 input ↵Craig Topper2018-01-261-6/+3
| | | | | | | | type. NFC These kinds of setccs are promoted by a DAG combine before they ever get to legalization. llvm-svn: 323501
* [X86] Remove some dead code from LowerVSETCC. NFCCraig Topper2018-01-261-13/+0
| | | | | | This code was added in r321967, but ultimately I fixed the issue in the legalizer and this code was no longer required. llvm-svn: 323500
* Don't enable _LIBUNWIND_BUILD_ZERO_COST_APIS if building the SJLJ APIsMartin Storsjo2018-01-261-0/+2
| | | | | | | | | | | | Otherwise, a shared library build with SJLJ APIs enabled would end up with duplicate symbols. This didn't occur for the apple && arm case due to specifically checking for that in the surrounding ifdef. Differential Revision: https://reviews.llvm.org/D42555 llvm-svn: 323499
* [CGP] Re-enable Select in complex addressing mode.Serguei Katkov2018-01-262-2/+2
| | | | | | Switch Select handling on after fixing two bugs: rL323192 and rL323497. llvm-svn: 323498
* [X86] Fix killed flag handling in X86FixupLea passSerguei Katkov2018-01-263-3/+4
| | | | | | | | | | | | | | | | When pass creates a MOV instruction for lea (%base,%index,1), %dst => mov %base,%dst; add %index,%dst modification it should clean the killed flag for base if base is equal to index. Otherwise verifier complains about usage of killed register in add instruction. Reviewers: lsaba, zvi, zansari, aaboud Reviewed By: lsaba Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42522 llvm-svn: 323497
* [cmake] [libunwind] Call llvm_setup_rpath() when adding shared libraries.Don Hinton2018-01-261-0/+3
| | | | | | | | | Clang and llvm already use llvm_setup_rpath(), so this change will help standarize rpath usage across all projects. Differential Revision: https://reviews.llvm.org/D42461 llvm-svn: 323496
* Reland:Don Hinton2018-01-261-0/+3
| | | | | | | | | | | [cmake] [libcxxabi] Call llvm_setup_rpath() when adding shared libraries. Clang and llvm already use llvm_setup_rpath(), so this change will help standarize rpath usage across all projects. Differential Revision: https://reviews.llvm.org/D42460 llvm-svn: 323495
* Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"Jake Ehrlich2018-01-262-11/+11
| | | | | | | Somehow I reverted changes I made in a previous Reland. This change re-relands unconfusing a varible name with a type name. llvm-svn: 323494
* Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"Jake Ehrlich2018-01-261-4/+4
| | | | | | I had more unused varibles. This change removes those to get rid of warnings. llvm-svn: 323493
* Reland: [cmake] [libcxx] Call llvm_setup_rpath() when adding shared libraries.Don Hinton2018-01-261-0/+3
| | | | | | | | | Clang and llvm already use llvm_setup_rpath(), so this change will help standarize rpath usage across all projects. Differential Revision: https://reviews.llvm.org/D42459 llvm-svn: 323492
* libcxx: Use vcruntime declarations for typeinfo on Windows.Peter Collingbourne2018-01-263-3/+10
| | | | | | | | | | | We need to use the vcruntime declarations on Windows to avoid an ODR violation involving rtti.obj, which provides the definition of the runtime function implementing dynamic_cast and depends on the vcruntime implementations of bad_cast and bad_typeid. Differential Revision: https://reviews.llvm.org/D42220 llvm-svn: 323491
* libcxx: Move #include_next <math.h> out of header guard in wrapper header.Peter Collingbourne2018-01-262-2/+33
| | | | | | | | | | | | | | | Code on Windows expects to be able to do: #define _USE_MATH_DEFINES #include <math.h> and receive the definitions of mathematical constants, even if <math.h> has previously been included. To support this scenario, re-include <math.h> every time the wrapper header is included. Differential Revision: https://reviews.llvm.org/D42403 llvm-svn: 323490
* Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"Jake Ehrlich2018-01-261-0/+2
| | | | | | Added line to output the proper files in the output to binary case. llvm-svn: 323489
OpenPOWER on IntegriCloud