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* [ubsan] Add support for reporting diagnostics to a monitor processVedant Kumar2018-06-229-59/+246
| | | | | | | | | | | | | | | | | | Add support to the ubsan runtime for reporting diagnostics to a monitor process (e.g a debugger). The Xcode IDE uses this by setting a breakpoint on __ubsan_on_report and collecting diagnostic information via __ubsan_get_current_report_data, which it then surfaces to users in the editor UI. Testing for this functionality already exists in upstream lldb, here: lldb/packages/Python/lldbsuite/test/functionalities/ubsan Apart from that, this is `ninja check-{a,ub}san` clean. Differential Revision: https://reviews.llvm.org/D48446 llvm-svn: 335371
* [X86] Don't allow ESP/RSP to be used as an index register in assembly.Craig Topper2018-06-222-1/+10
| | | | | | Fixes PR37892 llvm-svn: 335370
* [LoopUnswitch]Fix comparison for DomTree updates.Alina Sbirlea2018-06-221-2/+3
| | | | | | | | | | | | | | | | | | | Summary: In LoopUnswitch when replacing a branch Parent -> Succ with a conditional branch Parent -> True & Parent->False, the DomTree updates should insert an edge for each of True/False if True/False are different than Succ, and delete Parent->Succ edge if both are different. The comparison with Succ appears to be incorect, it's comparing with Parent instead. There is no test failing either before or after this change, but it seems to me this is the right way to do the update. Reviewers: chandlerc, kuhar Subscribers: sanjoy, jlebar, llvm-commits Differential Revision: https://reviews.llvm.org/D48457 llvm-svn: 335369
* [llvm-mca] Remove redundant call. NFCAndrea Di Biagio2018-06-221-2/+0
| | | | llvm-svn: 335368
* [X86] Add a test to show missed opportunity to generate vfnmaddEaswaran Raman2018-06-221-0/+28
| | | | llvm-svn: 335367
* Add const qualifier on FieldChainInfoComparator::operator()Steven Wu2018-06-221-1/+1
| | | | | | | libcxx has user defined warning to check for non const call operator. Silence the warning by adding the const on operator(). llvm-svn: 335366
* Initialize LiveRegs once in BranchFolder::mergeCommonTailsKrzysztof Parzyszek2018-06-221-1/+2
| | | | llvm-svn: 335365
* [SLPVectorizer] Support alternate opcodes in tryToVectorizeListSimon Pilgrim2018-06-225-531/+274
| | | | | | | | | | Enable tryToVectorizeList to support InstructionsState alternate opcode patterns at a root (build vector etc.) as well as further down the vectorization tree. NOTE: This patch reduces some of the debug reporting if there are opcode mismatches - I can try to add it back if it proves a problem. But it could get rather messy trying to provide equivalent verbose debug strings via getSameOpcode etc. Differential Revision: https://reviews.llvm.org/D48488 llvm-svn: 335364
* [llvm-mca] Set the operand ID for implicit register reads/writes. NFCAndrea Di Biagio2018-06-222-36/+43
| | | | | | | Also, move the definition of InstRef at the end of Instruction.h to avoid a forward declaration. llvm-svn: 335363
* [OpenCL] Fixed parsing of address spaces for C++.Anastasia Stulova2018-06-222-0/+9
| | | | | | | Added address space tokens to C++ parsing code to be able to parse declarations that start from an address space keyword. llvm-svn: 335362
* [llvm-mca] Introduce a sequential container of StagesMatt Davis2018-06-2210-74/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Remove explicit stages and introduce a list of stages. A pipeline should be composed of an arbitrary list of stages, and not any predefined list of stages in the Backend. The Backend should not know of any particular stage, rather it should only be concerned that it has a list of stages, and that those stages will fulfill the contract of what it means to be a Stage (namely pre/post/execute a given instruction). For now, we leave the original set of stages defined in the Backend ctor; however, I imagine these will be moved out at a later time. This patch makes an adjustment to the semantics of Stage::isReady. Specifically, what the Backend really needs to know is if a Stage has unfinished work. With that said, it is more appropriately renamed Stage::hasWorkToComplete(). This change will clean up the check in Backend::run(), allowing us to query each stage to see if there is unfinished work, regardless of what subclass a stage might be. I feel that this change simplifies the semantics too, but that's a subjective statement. Given how RetireStage and ExecuteStage handle data in their preExecute(), I've had to change the order of Retire and Execute in our stage list. Retire must complete any of its preExecute actions before ExecuteStage's preExecute can take control. This is mainly because both stages utilize the RCU. In the meantime, I want to see if I can adjust that or remove that coupling. Reviewers: andreadb, RKSimon, courbet Reviewed By: andreadb Subscribers: tschuett, gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D46907 llvm-svn: 335361
* [clangd] More precise representation of symbol names/labels in the index.Sam McCall2018-06-2213-264/+199
| | | | | | | | | | | | | | | | | | | | | | Summary: Previously, the strings matched LSP completion pretty closely. The completion label was a single string, for instance. This made implementing completion itself easy but makes it hard to use the names in other way, e.g. pretty-printed name in synthesized documentation/hover. It also limits our introspection into completion items, which can only be as precise as the indexed symbols. This change is a prerequisite to improvements to overload bundling which need to inspect e.g. signature structure. Reviewers: ioeric Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D48475 llvm-svn: 335360
* [SLPVectorizer] reorderAltShuffleOperands should just take ↵Simon Pilgrim2018-06-221-7/+5
| | | | | | | | InstructionsState. NFCI. All calls were extracting the InstructionsState Opcode/AltOpcode values so we might as well pass it directly llvm-svn: 335359
* [Sema] Updated note for address spaces to print the type.Anastasia Stulova2018-06-223-9/+7
| | | | | | This allows to reuse the same diagnostic for OpenCL or CUDA. llvm-svn: 335358
* [ELF] - ICF: test we do not merge sections which relocations differs only in ↵George Rimar2018-06-221-0/+20
| | | | | | | | | | | addend. This is to test the following `return false` line which was uncovered by our tests earlier: https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L255 llvm-svn: 335357
* Fix test again, try to keep all targets happyPaul Robinson2018-06-221-2/+2
| | | | llvm-svn: 335356
* Revert "[WebAssembly] Error on mismatched function signature in final output"Sam Clegg2018-06-227-46/+16
| | | | | | | | | | This caused a lot of issues on the WebAssembly waterfall. In particular, until with the signature of `main`. We probably want a better solution for main before we re-land. Reverts rL335192 llvm-svn: 335355
* [ELF] - Repair (re-enable) few ICF test cases.George Rimar2018-06-225-5/+5
| | | | | | | | | --verbose is not used to report ICF sections since r324755, --print-icf-sections is used instead. These tests were at fact disabled since that time. llvm-svn: 335354
* Fix test, nop is not always 1 bytePaul Robinson2018-06-221-3/+3
| | | | llvm-svn: 335353
* [Driver] Make scudo compatible with -fsanitize-minimal-runtimeKostya Kortchinsky2018-06-224-10/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the clang side of the change, there is a compiler-rt counterpart. Scudo works with UBSan using `-fsanitize=scudo,integer` for example, and to do so it embeds UBSan runtime. This makes it not compatible with the UBSan minimal runtime, but this is something we want for production purposes. The idea is to have a Scudo minimal runtime on the compiler-rt side that will not embed UBSan. This is basically the runtime that is currently in use for Fuchsia, without coverage, stacktraces or symbolization. With this, Scudo becomes compatible with `-fsanitize-minimal-runtime`. If this approach is suitable, I'll add the tests as well, otherwise I am open to other options. Reviewers: eugenis Reviewed By: eugenis Subscribers: llvm-commits, cfe-commits Differential Revision: https://reviews.llvm.org/D48373 llvm-svn: 335352
* [ELF] - ICF: Add 2 more test cases.George Rimar2018-06-222-0/+92
| | | | | | | | | | These test cases covers the following condition: https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L243 It was uncovered by our tests. I was able to delete the whole `if` and no test failed. llvm-svn: 335351
* [DWARFv5] Allow ".loc 0" to refer to the root file.Paul Robinson2018-06-224-4/+35
| | | | | | | | | DWARF v5 explicitly represents file #0 in the line table. Prior versions did not, so ".loc 0" is still an error in those cases. Differential Revision: https://reviews.llvm.org/D48452 llvm-svn: 335350
* [SLPVectorizer] Relax alternate opcodes to accept any BinaryOperator pairSimon Pilgrim2018-06-222-46/+26
| | | | | | | | | | SLP currently only accepts (F)Add/(F)Sub alternate counterpart ops to be merged into an alternate shuffle. This patch relaxes this to accept any pair of BinaryOperator opcodes instead, assuming the target's cost model accepts the vectorization+shuffle. Differential Revision: https://reviews.llvm.org/D48477 llvm-svn: 335349
* [SLPVectorizer][X86] Add alternate opcode tests for simple build vector casesSimon Pilgrim2018-06-222-0/+840
| | | | llvm-svn: 335348
* [InstCombine] add shuffle+binops test from PR37806; NFCSanjay Patel2018-06-221-0/+15
| | | | | | | | | This one shows another pattern that we'll need to match in some cases, but the current ordering of folds allows us to match this as 2 binops before simplification takes place. llvm-svn: 335347
* [ELF] - ICF: remove excessive check. NFC.George Rimar2018-06-221-3/+0
| | | | | | | | | | | | | | | | Change removes the excessive comparsion of the relocation arrays sizes. This code was dead, because at the higer level, equalsConstant function contains the following check: `A->NumRelocations != B->NumRelocations` where NumRelocations contains the size of the relocations array. So removed check did the same job twice. This was found with use of code coverage analysis. llvm-svn: 335346
* [InstCombine] add tests for shuffle-with-different-binops; NFCSanjay Patel2018-06-221-0/+42
| | | | llvm-svn: 335345
* Android.rules: Use libc++ by defaultPavel Labath2018-06-223-9/+14
| | | | | | | | | | | | | | | | libstdc++ will soon be dropped from the android NDK. This patch makes sure we are prepared for that by using libc++ in tests by default (i.e., except for libstdc++ data formatter tests). Only a couple of small tweaks were needed to make this work: - Add the libc++ include paths to CXXFLAGS only. This was necessary to make the tests compile with -fmodules. The modules tests have been disabled, but this way, they will be ready for them if they are enabled. - in one test I had to add an explicit std::string copy to make sure the copy constructor is there for the expression evaluator to find it. llvm-svn: 335344
* [InstCombine] rearrange shuffle-of-binops logic; NFCSanjay Patel2018-06-221-17/+12
| | | | | | | | The commutative matcher makes things more complicated here, and I'm planning an enhancement where this form is more readable. llvm-svn: 335343
* [X86] Regenerate tests to include fma commentsSimon Pilgrim2018-06-221-8/+8
| | | | | | Noticed in the review of D48467 llvm-svn: 335342
* ResolveAddress: check returned value of resolving functions.Tatyana Krasnukha2018-06-221-7/+8
| | | | llvm-svn: 335341
* [X86] Add notes to a few intrinsicsGabor Buella2018-06-221-0/+6
| | | | | | | | | | | | | This a change corresponding to the clang change in https://reviews.llvm.org/D45616 Reviewers: craig.topper, uriel.k, RKSimon, andrew.w.kaylor, spatel, scanon, efriedma Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D48280 llvm-svn: 335340
* [X86] Lower _mm[256|512]_cmp[.]_mask intrinsics to native llvm IRGabor Buella2018-06-226-203/+395
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Lowering some vector comparision builtins to fcmp IR instructions. This ignores the signaling behaviour specified in the predicate argument of said builtins. Affected AVX512 builtins: __builtin_ia32_cmpps128_mask __builtin_ia32_cmpps256_mask __builtin_ia32_cmpps512_mask __builtin_ia32_cmppd128_mask __builtin_ia32_cmppd256_mask __builtin_ia32_cmppd512_mask Reviewers: craig.topper, uriel.k, RKSimon, andrew.w.kaylor, spatel, scanon, efriedma Reviewed By: craig.topper, spatel, efriedma Differential Revision: https://reviews.llvm.org/D45616 llvm-svn: 335339
* [clang-format] Add AlwaysBreakBeforeMultilineString testsJacek Olesiak2018-06-221-0/+9
| | | | | | | | | | | | | | Summary: Followup to D47393. Reviewers: stephanemoore Reviewed By: stephanemoore Subscribers: benhamilton, cfe-commits Differential Revision: https://reviews.llvm.org/D48432 llvm-svn: 335338
* [ELF] - Change how we handle suplicate -wrap. [NFC]George Rimar2018-06-222-5/+9
| | | | | | | This avoids doing llvm::sort and std::unique for -wrap options. I think it is more clean way. llvm-svn: 335337
* Recommit r335333 "[MC] - Add .stack_size sections into groups and link them ↵George Rimar2018-06-227-9/+77
| | | | | | | | | | | | | | | | | | | | | | | with .text" With compilation fix. Original commit message: D39788 added a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. This change does following two things on top: 1) Imagine the case when there are -ffunction-sections flag given and there are text sections in COMDATs. The patch adds a '.stack-size' section into corresponding COMDAT group, so that linker will be able to eliminate them fast during resolving the COMDATs. 2) Patch sets a SHF_LINK_ORDER flag and links '.stack-size' with the corresponding .text. With that linker will be able to do -gc-sections on dead stack sizes sections. Differential revision: https://reviews.llvm.org/D46874 llvm-svn: 335336
* [IR] Use Instruction::isBinaryOp helper instead of raw enum range tests. NFCI.Simon Pilgrim2018-06-222-6/+3
| | | | llvm-svn: 335335
* [clangd] Expose qualified symbol names in CompletionItem (C++ structure ↵Eric Liu2018-06-226-12/+48
| | | | | | | | | | | | | | | | | | | | only, no json). Summary: The qualified name can be used to match a completion item to its corresponding symbol. This can be useful for tools that measure code completion quality. Qualified names are not precise for identifying symbols; we need to figure out a better way to identify completion items. Reviewers: sammccall Reviewed By: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D48425 llvm-svn: 335334
* Revert r335332 "[MC] - Add .stack_size sections into groups and link them ↵George Rimar2018-06-227-77/+9
| | | | | | | | | | | | with .text" It broke bots. http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/12891 http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/9443 http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/25551 llvm-svn: 335333
* [MC] - Add .stack_size sections into groups and link them with .textGeorge Rimar2018-06-227-9/+77
| | | | | | | | | | | | | | | | | D39788 added a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. This change does following two things on top: 1) Imagine the case when there are -ffunction-sections flag given and there are text sections in COMDATs. The patch adds a '.stack-size' section into corresponding COMDAT group, so that linker will be able to eliminate them fast during resolving the COMDATs. 2) Patch sets a SHF_LINK_ORDER flag and links '.stack-size' with the corresponding .text. With that linker will be able to do -gc-sections on dead stack sizes sections. Differential revision: https://reviews.llvm.org/D46874 llvm-svn: 335332
* Recommit of r335326, with the test fixed that I missed.Sjoerd Meijer2018-06-223-14/+16
| | | | llvm-svn: 335331
* [hmaptool] Turn %hmaptool into a proper substitutionBenjamin Kramer2018-06-225-5/+9
| | | | | | | This is still super ugly, but at least it doesn't require working directories to just line up perfectly for python to find the tool. llvm-svn: 335330
* [CostModel][AArch64] Add some initial costs for SK_Select and ↵Simon Pilgrim2018-06-223-106/+88
| | | | | | | | | | | | | | SK_PermuteSingleSrc AArch64 was only setting costs for SK_Transpose, which meant that many of the simpler shuffles (e.g. SK_Select and SK_PermuteSingleSrc for larger vector elements) was being severely overestimated by the default shuffle expansion. This patch adds costs to help improve SLP performance and avoid a regression in reductions introduced by D48174. I'm not very knowledgeable about AArch64 shuffle lowering so I've kept the extra costs to a minimum - someone who knows this code can add extra costs which should improve vectorization a lot more. Differential Revision: https://reviews.llvm.org/D48172 llvm-svn: 335329
* Reverting r335326 while I look at the test failureSjoerd Meijer2018-06-222-15/+13
| | | | llvm-svn: 335328
* Revert r335324 due to a builtbot failureEugene Leviant2018-06-224-143/+3
| | | | llvm-svn: 335327
* [ARM] ARMv6m and v8m.baseline strict alignSjoerd Meijer2018-06-222-13/+15
| | | | | | | | | | | | This sets target feature FeatureStrictAlign for Armv6-m and Armv8-m.baseline, because it has no support for unaligned accesses. It looks like we always pass target feature "+strict-align" from Clang, so this is not a user facing problem, but querying the subtarget (in e.g. llc) for unaligned access support is incorrect. Differential Revision: https://reviews.llvm.org/D48437 llvm-svn: 335326
* AMDGPU: Add patterns for i32/i64 local atomic load/storeMatt Arsenault2018-06-226-1/+159
| | | | | | | | Not sure why the 32/64 split is needed in the atomic_load store hierarchies. The regular PatFrags do this, but we don't do it for the existing handling for global. llvm-svn: 335325
* [Evaluator] Improve evaluation of call instructionEugene Leviant2018-06-224-3/+143
| | | | | | Differential revision: https://reviews.llvm.org/D46584 llvm-svn: 335324
* [X86] Changing the check for valid inputs in combineScalarToVectorMikhail Dvoretckii2018-06-222-6/+15
| | | | | | | | | Changing the logic of scalar mask folding to check for valid input types rather than against invalid ones, making it more robust and fixing PR37879. Differential Revision: https://reviews.llvm.org/D48366 llvm-svn: 335323
* tsan: fix deficiency in MutexReadOrWriteUnlockDmitry Vyukov2018-06-221-1/+1
| | | | | | | | | | MutexUnlock uses ReleaseStore on s->clock, which is the right thing to do. However MutexReadOrWriteUnlock for writers uses Release on s->clock. Make MutexReadOrWriteUnlock also use ReleaseStore for consistency and performance. Unfortunately, I don't think any test can detect this as this only potentially affects performance. llvm-svn: 335322
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