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* [Fuzzer] Update the header path for fdio/spawn.h on FuchsiaPetr Hosek2018-06-071-1/+1
| | | | | | | | The path now includes lib/ prefix. Differential Revision: https://reviews.llvm.org/D47866 llvm-svn: 334213
* [CMake] Filter out -z,defs when building custom libc++Petr Hosek2018-06-071-3/+7
| | | | | | | | | -z,defs is incompatible with sanitizers so we need to filter it out from the linker flags before passing them to the libc++ build. Differential Revision: https://reviews.llvm.org/D47865 llvm-svn: 334212
* [TargetLibraryInfo] add mappings from LLVM sin/cos intrinsics to SVML callsSanjay Patel2018-06-072-4/+20
| | | | | | | | | | | | | | | These weren't included in D19544 - probably just an oversight. D40044 made it more likely that we'll have LLVM math intrinsics rather than libcalls, so this bug was more easily exposed. As the tests/code show, we already have the complete mappings for pow/exp/log. I don't have any experience with SVML, so I don't know if anything else is missing. It's also not clear to me that we should be doing this transform in IR rather than DAG/isel, but that's a separate issue. Differential Revision: https://reviews.llvm.org/D47610 llvm-svn: 334211
* [lit, windows] Disable a number of tests that are failing on WindowsStella Stamenova2018-06-0720-0/+39
| | | | | | | | | | | | | | Summary: They all correspond to bugs that are already logged and I've added the appropriate (or most appropriate) bug numbers. This leaves only a handful of failing tests. Reviewers: asmith, zturner, labath Reviewed By: zturner Subscribers: eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D47892 llvm-svn: 334210
* [LSR] Check yet more intrinsic pointer operandsDaniil Fukalov2018-06-072-5/+54
| | | | | | | | the patch fixes another assertion in isLegalUse() Differential Revision: https://reviews.llvm.org/D47794 llvm-svn: 334209
* [X86] Add back builtins for _mm_slli_si128/_mm_srli_si128 and similar ↵Craig Topper2018-06-079-260/+102
| | | | | | | | | | intrinsics. We still lower them to native shuffle IR, but we do it in CGBuiltin.cpp now. This allows us to check the target feature and ensure the immediate fits in 8 bits. This also improves our -O0 codegen slightly because we're able to see the zeroinitializer in the shuffle. It looks like it got lost behind a store+load previously. llvm-svn: 334208
* [docs] add various sanitisers support for FreeBSD/OpenBSDDavid Carlier2018-06-071-0/+3
| | | | | | | | | | | | since couple of months, supports had been enabled for FreeBSD and OpenBSD. Reviewers: thakis, spatel, dim Reviewed By: dim Differential Revision: https://reviews.llvm.org/D47322 llvm-svn: 334207
* [NFC][InstSimplify] Add more tests for shl nuw C, %x -> C fold.Roman Lebedev2018-06-071-0/+86
| | | | | | | Follow-up for rL334200. For these, KnownBits will be needed. llvm-svn: 334206
* [Platform] Accept arbitrary kext variantsJonas Devlieghere2018-06-072-22/+43
| | | | | | | | | | | | | | | | | | | When loading kexts in PlatformDarwinKernel, we use the BundleID as the filename to to create shared modules. In GetSharedModule we call ExamineKextForMatchingUUID for any BundleID it finds that is a match, to see if the UUID is also a match. Until now we were using Host::ResolveExecutableInBundle which calls a CoreFoundation API to obtain the executable. However, it's possible that the executable has a variant suffix (e.g. foo_development) and these files were ignored. This patch replaces that call with logic that looks for all the binaries in the bundle. Because of the way ExamineKextForMatchingUUID works, it's fine to try to load executables that are not valid and we can just iterate over the list until we found a match. Differential revision: https://reviews.llvm.org/D47539 llvm-svn: 334205
* [X86][SSE] Updated comment - combineVectorSignBitsTruncation handles PACKSS ↵Simon Pilgrim2018-06-071-1/+1
| | | | | | and PACKUS. NFCI. llvm-svn: 334204
* [RISCV] AsmParser support for the li pseudo instructionAlex Bradbury2018-06-0710-31/+514
| | | | | | | | | | | | | | The implementation follows the MIPS backend and expands the pseudo instruction directly during asm parsing. As the result, only real MC instructions are emitted to the MCStreamer. The actual expansion to real instructions is similar to the expansion performed by the GNU Assembler. This patch supersedes D41949. Differential Revision: https://reviews.llvm.org/D46118 Patch by Mario Werner. llvm-svn: 334203
* [AVR] Fix build after r334078Alex Bradbury2018-06-072-4/+10
| | | | | | | r334078 added MCSubtargetInfo to fixupNeedsRelaxation and applyFixup. This patch makes the necessary adjustment for the AVR target. llvm-svn: 334202
* [X86][SSE] Simplify combineVectorTruncationWithPACKUS. NFCI.Simon Pilgrim2018-06-071-42/+42
| | | | | | Move code only used by combineVectorTruncationWithPACKUS out of combineVectorTruncation. llvm-svn: 334201
* [NFC][InstSimplify] Add tests for shl nuw C, %x -> C fold.Roman Lebedev2018-06-071-0/+123
| | | | | | | | | | | | | | %r = shl nuw i8 C, %x As per langref: If the nuw keyword is present, then the shift produces a poison value if it shifts out any non-zero bits. Thus, if the sign bit is set on C, then %x can only be 0, which means that %r can only be C. https://rise4fun.com/Alive/WMk Was mentioned in D47428 review. llvm-svn: 334200
* [x86] add tests for backwards propagate mask bug (PR37060, PR37667); NFCSanjay Patel2018-06-071-0/+52
| | | | llvm-svn: 334199
* DIERef: move trivial constructors into the headerPavel Labath2018-06-072-9/+4
| | | | | | | | | This enables more inlining/optimization opportunities for a fairly critical class. NFCI llvm-svn: 334198
* [llvm-exegesis] Make BenchmarkRunner handle multiple configurations.Guillaume Chatelet2018-06-077-98/+101
| | | | | | | | | | | | Summary: BenchmarkRunner subclasses can now create many configurations - although this patch still generates one. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47877 llvm-svn: 334197
* [llvm-objdump] Add -R optionPaul Semel2018-06-074-19/+114
| | | | | | | | This option prints dynamic relocation entries of the given file Differential Revision: https://reviews.llvm.org/D47493 llvm-svn: 334196
* [PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelectorHiroshi Inoue2018-06-072-0/+26
| | | | | | | | | | | | | | | | BitPermutationSelector sets Repl32 flag for bit groups which can be (potentially) benefit from 32-bit rotate-and-mask instructions with bit replication, i.e. rlwinm/rlwimi copies lower 32 bits into upper 32 bits on 64-bit PowerPC before rotation. However, enforcing 32-bit instruction sometimes results in redundant generated code. For example, the following simple code is compiled into rotldi + rlwimi while it can be compiled into only rldimi instruction if Repl32 flag is not set on the bit group for (a & 0xFFFFFFFF). uint64_t func(uint64_t a, uint64_t b) { return (a & 0xFFFFFFFF) | (b << 32) ; } To avoid such problem, this patch checks the potential benefit of Repl32 flag before setting it. If a bit group does not require rotation (i.e. RLAmt == 0) and won't be merged into another group, we do not benefit from Repl32 flag on this group. Differential Revision: https://reviews.llvm.org/D47867 llvm-svn: 334195
* [Mips] Silencing warnings in instruction info (NFC)Petar Jovanovic2018-06-071-12/+18
| | | | | | | | | | | isORCopyInst and isReadOrWriteToDSPReg functions were producing warning that some statements my fall through. Patch by Nikola Prica. Differential Revision: https://reviews.llvm.org/D47876 llvm-svn: 334194
* [X86][SSE] Simplify combineVectorTruncationWithPACKSS to reduce code duplicationSimon Pilgrim2018-06-073-36/+13
| | | | | | Simplify combineVectorTruncationWithPACKSS to just a SIGN_EXTEND_INREG followed by using the existing truncateVectorWithPACK instead of duplicating code. llvm-svn: 334193
* [clangd] Code completion: drop explicit injected names/operators, ignore ↵Sam McCall2018-06-077-45/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sema priority Summary: Now we have most of Sema's code completion signals incorporated in Quality, which will allow us to give consistent ranking to sema/index results. Therefore we can/should stop using Sema priority as an explicit signal. This fixes some issues like namespaces always having a terrible score. The most important missing signals are: - Really dumb/rarely useful completions like: SomeStruct().^SomeStruct SomeStruct().^operator= SomeStruct().~SomeStruct() We already filter out destructors, this patch adds injected names and operators to that list. - type matching the expression context. Ilya has a plan to add this in a way that's compatible with indexes (design doc should be shared real soon now!) Reviewers: ioeric Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47871 llvm-svn: 334192
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-071-2/+2
| | | | llvm-svn: 334191
* DebugNamesDWARFIndex: Add type lookup suportPavel Labath2018-06-073-1/+21
| | | | | | | | This implements just one of the GetTypes overloads. The other is not testable from lldb-test so I'm leaving it unimplemented until I figure out what to do with testing. llvm-svn: 334190
* AMDGPU: Fix not including v2f64 in SReg_128Matt Arsenault2018-06-073-4/+47
| | | | | | Fixes assertion with calls returning v2f64. llvm-svn: 334189
* [X86][SSE] Add extra trunc(shl) test casesSimon Pilgrim2018-06-071-3/+43
| | | | | | | | The existing trunc_shl_17_v8i16_v8i32 test case should (but doesn't) fold to zero, I've added 2 new test cases: - trunc_shl_16_v8i16_v8i32 which folds to zero (this is actually testing the target faux shuffle combine) - trunc_shl_15_v8i16_v8i32 which should perform the full shl + truncate llvm-svn: 334188
* [Mem2Reg] Avoid replacing load with itself in promoteSingleBlockAlloca.Florian Hahn2018-06-072-0/+25
| | | | | | | | | | | | | | We do the same thing in rewriteSingleStoreAlloca. Fixes PR37632. Reviewers: chandlerc, davide, efriedma Reviewed By: davide Differential Revision: https://reviews.llvm.org/D47825 llvm-svn: 334187
* DebugNamesDWARFIndex: add namespace lookup supportPavel Labath2018-06-073-1/+21
| | | | llvm-svn: 334186
* DebugNamesDWARFIndex: Add support for partial indexesPavel Labath2018-06-075-18/+71
| | | | | | | | | | | | | | | | | | | | | Summary: It possible that a single module has indexed and non-indexed compile units. In this case, we can use the fast indexed lookup for the first ones and fall back to the manual index for the others. This patch implements this functionality by adding a units_to_avoid argument to the ManualDWARFIndex constructor. Any units present in that list will be ignored for the purposes of manual index. Individual DebugNamesDWARFIndex then always consult both the manual fallback index as well as the index in the .debug_names section. Reviewers: JDevlieghere, clayborg Subscribers: aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D47832 llvm-svn: 334185
* AMDGPU: Use scalar operations for f16 fabs/fneg patternsMatt Arsenault2018-06-075-71/+36
| | | | | | Fixes unnecessary differences between subtargets. llvm-svn: 334184
* [X86] Regenerate rotate testsSimon Pilgrim2018-06-073-525/+856
| | | | | | Add 32-bit tests to show missed SHLD/SHRD cases llvm-svn: 334183
* [llvm-strip] Expose --strip-unneeded optionPaul Semel2018-06-073-3/+13
| | | | | | Differential Revision: https://reviews.llvm.org/D47818 llvm-svn: 334182
* DebugNamesDWARFIndex: Add ability to lookup variablesPavel Labath2018-06-0711-31/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds the ability to lookup variables to the DWARF v5 index class. During review we discovered an inconsistency between how the existing two indexes handle looking up qualified names of the variables: - manual index would return a value if the input string exactly matched the demangled name of some variable. - apple index ignored the context and returned any variable with the same base name. So, this patch also rectifies that situation: - it removes all context handling from the index classes. The GetGlobalVariables functions now just take a base name. For manual index, this meant we can stop putting demangled names into the variable index (this matches the behavior for functions). - context extraction is put into SymbolFileDWARF, so that it is common to all indexes. - additional filtering based on the context is also done in SymbolFileDWARF. This is done via a simple substring search, which is not ideal, but it matches what we are doing for functions (cf. Module::LookupInfo::Prune). Reviewers: clayborg, JDevlieghere Subscribers: aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D47781 llvm-svn: 334181
* AMDGPU: Try a lot harder to emit scalar loadsMatt Arsenault2018-06-0729-463/+850
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has two main components. First, widen widen short constant loads in DAG when they have the correct alignment. This is already done a bit in AMDGPUCodeGenPrepare, since that has access to DivergenceAnalysis. This can't help kernarg loads created in the DAG. Start to use DAG divergence analysis to help this case. The second part is to avoid kernel argument lowering breaking the alignment of short vector elements because calling convention lowering wants to split everything into legal register types. When loading a split type, load the nearest 4-byte aligned segment and shift to get the desired bits. This extra load of the earlier argument piece ends up merging, and the bit extract hopefully folds out. There are a number of improvements and regressions with this, but I think as-is this is a better compromise between several of the worst parts of SelectionDAG. Particularly when i16 is legal, this produces worse code for i8 and i16 element vector kernel arguments. This is partially due to the very weak load merging the DAG does. It only looks for fairly specific combines between pairs of loads which no longer appear. In particular this causes v4i16 loads to be split into 2 components when previously the two halves were merged. Worse, because of the newly introduced shifts, there is a lot more unnecessary vector packing and unpacking code emitted. At least some of this is due to reporting false for isTypeDesirableForOp for i16 as a workaround for the lack of divergence information in the DAG. The cases where this happens it doesn't actually matter, but the relevant code in SimplifyDemandedBits doens't have the context to know to ignore this. The use of the scalar cache is probably more important than the mess of mostly scalar instructions doing this packing and unpacking. Future work can fix this, possibly by making better use of the new DAG divergence information for controlling promotion decisions, or adding another version of shift + trunc + shift combines that doesn't only know about the used types. llvm-svn: 334180
* [clang-format] Consider tok::hashhash in python-style commentsKrasimir Georgiev2018-06-073-2/+25
| | | | | | | | | | Summary: We were missing the case when python-style comments in text protos start with `##`. Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47870 llvm-svn: 334179
* [X86][NFC] Fix harmless typo in BtVer2 model.Clement Courbet2018-06-071-2/+2
| | | | | | See D46356 for context. llvm-svn: 334178
* [LLDB] Unit tests / typo fixDavid Carlier2018-06-071-1/+1
| | | | | | removing unnecessary comma. llvm-svn: 334177
* [clangd] Fix using the incorrect Index for go-to-definition.Haojian Wu2018-06-071-1/+1
| | | | | | | | | | Reviewers: sammccall Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47869 llvm-svn: 334176
* [X86] Block UndefRegUpdateTomasz Krupa2018-06-074-22/+46
| | | | | | | | | | | | Summary: Prevent folding of operations with memory loads when one of the sources has undefined register update. Reviewers: craig.topper Subscribers: llvm-commits, mike.dvoretsky, ashlykov Differential Revision: https://reviews.llvm.org/D47621 llvm-svn: 334175
* [CodeGen] Improve diagnostics related to target attributesGabor Buella2018-06-075-26/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When requirement imposed by __target__ attributes on functions are not satisfied, prefer printing those requirements, which are explicitly mentioned in the attributes. This makes such messages more useful, e.g. printing avx512f instead of avx2 in the following scenario: ``` $ cat foo.c static inline void __attribute__((__always_inline__, __target__("avx512f"))) x(void) { } int main(void) { x(); } $ clang foo.c foo.c:7:2: error: always_inline function 'x' requires target feature 'avx2', but would be inlined into function 'main' that is compiled without support for 'avx2' x(); ^ 1 error generated. ``` bugzilla: https://bugs.llvm.org/show_bug.cgi?id=37338 Reviewers: craig.topper, echristo, dblaikie Reviewed By: craig.topper, echristo Differential Revision: https://reviews.llvm.org/D46541 llvm-svn: 334174
* [NFC] Use variable instead of accessing pair many timesMax Kazantsev2018-06-071-6/+6
| | | | llvm-svn: 334173
* Run clang-formatPhilip Pfaffe2018-06-071-1/+1
| | | | llvm-svn: 334172
* Test commit access.Tomasz Krupa2018-06-071-5/+5
| | | | | | Added a bunch of periods after comments. llvm-svn: 334171
* [clangd] fix unintended fallthrough in scope-based scoringSam McCall2018-06-071-0/+3
| | | | llvm-svn: 334170
* [llvm-exegesis] Add a Configuration object for Benchmark.Guillaume Chatelet2018-06-076-29/+43
| | | | | | | | | | | | Summary: This is the first step to have the BenchmarkRunner create and measure many different configurations (different initial values for instance). Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47826 llvm-svn: 334169
* Disable recursive interceptors in signal(3)/MSanKamil Rytarowski2018-06-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: signal(3) on NetBSD calls internally sigaction(2). Without disabling the recursive interceptor, there are false positives about uninitialized memory reads inside libc. This change fixes execution of such programs as sh(1) and vmstat(1) in the NetBSD userland. Sponsored by <The NetBSD Foundation> Reviewers: eugenis, vitalybuka, joerg Reviewed By: vitalybuka Subscribers: llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D47650 llvm-svn: 334168
* [llvm-exegesis] Improve error reporting.Guillaume Chatelet2018-06-074-43/+58
| | | | | | | | | | | | Summary: BenchmarkResult IO functions now return an Error or Expected so caller can deal take proper action. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47868 llvm-svn: 334167
* Fix a missing lambda return type that tripped the buildersPhilip Pfaffe2018-06-071-1/+1
| | | | llvm-svn: 334166
* [llvm-exegesis] Serializes instruction's operand in BenchmarkResult's key.Guillaume Chatelet2018-06-073-28/+106
| | | | | | | | | | | | Summary: Follow up patch to https://reviews.llvm.org/D47764. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D47785 llvm-svn: 334165
* [X86][NFC] Fix harmless typos in BDW/ZnVer1 sched models.Clement Courbet2018-06-072-11/+11
| | | | | | See D46356 for context. llvm-svn: 334164
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