1 files changed, 47 insertions, 0 deletions
diff --git a/polly/test/Isl/CodeGen/MemAccess/update_access_functions___%loop1---%exit.jscop b/polly/test/Isl/CodeGen/MemAccess/update_access_functions___%loop1---%exit.jscop
new file mode 100644
index 00000000000..733280104a6
--- /dev/null
+++ b/polly/test/Isl/CodeGen/MemAccess/update_access_functions___%loop1---%exit.jscop
@@ -0,0 +1,47 @@
+{
+   "context" : "[arg] -> {  : arg >= -9223372036854775808 and arg <= 9223372036854775807 }",
+   "name" : "loop1 => exit",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "[arg] -> { Stmt_loop1[i0] -> MemRef_A[1 + i0] }"
+            }
+         ],
+         "domain" : "[arg] -> { Stmt_loop1[i0] : i0 >= 0 and i0 <= -2 + arg }",
+         "name" : "Stmt_loop1",
+         "schedule" : "[arg] -> { Stmt_loop1[i0] -> [0, i0] }"
+      },
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_A[1 + i0] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "[arg] -> { Stmt_loop2[i0] -> MemRef_val[] }"
+            }
+         ],
+         "domain" : "[arg] -> { Stmt_loop2[i0] : i0 >= 0 and i0 <= -2 + arg }",
+         "name" : "Stmt_loop2",
+         "schedule" : "[arg] -> { Stmt_loop2[i0] -> [1, i0] }"
+      },
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_val[] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "[arg] -> { Stmt_loop3[i0] -> MemRef_A[1 + i0] }"
+            }
+         ],
+         "domain" : "[arg] -> { Stmt_loop3[i0] : i0 >= 0 and i0 <= -2 + arg }",
+         "name" : "Stmt_loop3",
+         "schedule" : "[arg] -> { Stmt_loop3[i0] -> [2, i0] }"
+      }
+   ]
+}