1 files changed, 49 insertions, 50 deletions

diff --git a/mlir/lib/Dialect/AffineOps/AffineOps.cpp b/mlir/lib/Dialect/AffineOps/AffineOps.cpp
index 5f4cc2e1060..0da539ea9f0 100644
--- a/mlir/lib/Dialect/AffineOps/AffineOps.cpp
+++ b/mlir/lib/Dialect/AffineOps/AffineOps.cpp
@@ -108,8 +108,8 @@ static bool isFunctionRegion(Region *region) {
 /// symbol.
 bool mlir::isTopLevelValue(Value value) {
   if (auto arg = value.dyn_cast<BlockArgument>())
-    return isFunctionRegion(arg->getOwner()->getParent());
-  return isFunctionRegion(value->getDefiningOp()->getParentRegion());
+    return isFunctionRegion(arg.getOwner()->getParent());
+  return isFunctionRegion(value.getDefiningOp()->getParentRegion());
 }
 
 // Value can be used as a dimension id if it is valid as a symbol, or
@@ -117,10 +117,10 @@ bool mlir::isTopLevelValue(Value value) {
 // with dimension id arguments.
 bool mlir::isValidDim(Value value) {
   // The value must be an index type.
-  if (!value->getType().isIndex())
+  if (!value.getType().isIndex())
     return false;
 
-  if (auto *op = value->getDefiningOp()) {
+  if (auto *op = value.getDefiningOp()) {
     // Top level operation or constant operation is ok.
     if (isFunctionRegion(op->getParentRegion()) || isa<ConstantOp>(op))
       return true;
@@ -134,7 +134,7 @@ bool mlir::isValidDim(Value value) {
     return false;
   }
   // This value has to be a block argument for a FuncOp or an affine.for.
-  auto *parentOp = value.cast<BlockArgument>()->getOwner()->getParentOp();
+  auto *parentOp = value.cast<BlockArgument>().getOwner()->getParentOp();
   return isa<FuncOp>(parentOp) || isa<AffineForOp>(parentOp);
 }
 
@@ -162,11 +162,11 @@ static bool isDimOpValidSymbol(DimOp dimOp) {
   // The dim op is also okay if its operand memref/tensor is a view/subview
   // whose corresponding size is a valid symbol.
   unsigned index = dimOp.getIndex();
-  if (auto viewOp = dyn_cast<ViewOp>(dimOp.getOperand()->getDefiningOp()))
+  if (auto viewOp = dyn_cast<ViewOp>(dimOp.getOperand().getDefiningOp()))
     return isMemRefSizeValidSymbol<ViewOp>(viewOp, index);
-  if (auto subViewOp = dyn_cast<SubViewOp>(dimOp.getOperand()->getDefiningOp()))
+  if (auto subViewOp = dyn_cast<SubViewOp>(dimOp.getOperand().getDefiningOp()))
     return isMemRefSizeValidSymbol<SubViewOp>(subViewOp, index);
-  if (auto allocOp = dyn_cast<AllocOp>(dimOp.getOperand()->getDefiningOp()))
+  if (auto allocOp = dyn_cast<AllocOp>(dimOp.getOperand().getDefiningOp()))
     return isMemRefSizeValidSymbol<AllocOp>(allocOp, index);
   return false;
 }
@@ -177,10 +177,10 @@ static bool isDimOpValidSymbol(DimOp dimOp) {
 // constraints.
 bool mlir::isValidSymbol(Value value) {
   // The value must be an index type.
-  if (!value->getType().isIndex())
+  if (!value.getType().isIndex())
     return false;
 
-  if (auto *op = value->getDefiningOp()) {
+  if (auto *op = value.getDefiningOp()) {
     // Top level operation or constant operation is ok.
     if (isFunctionRegion(op->getParentRegion()) || isa<ConstantOp>(op))
       return true;
@@ -283,7 +283,7 @@ LogicalResult AffineApplyOp::verify() {
       return emitOpError("operands must be of type 'index'");
   }
 
-  if (!getResult()->getType().isIndex())
+  if (!getResult().getType().isIndex())
     return emitOpError("result must be of type 'index'");
 
   // Verify that the map only produces one result.
@@ -332,7 +332,7 @@ AffineDimExpr AffineApplyNormalizer::renumberOneDim(Value v) {
   if (inserted) {
     reorderedDims.push_back(v);
   }
-  return getAffineDimExpr(iterPos->second, v->getContext())
+  return getAffineDimExpr(iterPos->second, v.getContext())
       .cast<AffineDimExpr>();
 }
 
@@ -365,7 +365,7 @@ static llvm::SetVector<unsigned>
 indicesFromAffineApplyOp(ArrayRef<Value> operands) {
   llvm::SetVector<unsigned> res;
   for (auto en : llvm::enumerate(operands))
-    if (isa_and_nonnull<AffineApplyOp>(en.value()->getDefiningOp()))
+    if (isa_and_nonnull<AffineApplyOp>(en.value().getDefiningOp()))
       res.insert(en.index());
   return res;
 }
@@ -487,7 +487,7 @@ AffineApplyNormalizer::AffineApplyNormalizer(AffineMap map,
     // 1. Only dispatch dims or symbols.
     for (auto en : llvm::enumerate(operands)) {
       auto t = en.value();
-      assert(t->getType().isIndex());
+      assert(t.getType().isIndex());
       bool isDim = (en.index() < map.getNumDims());
       if (isDim) {
         // a. The mathematical composition of AffineMap composes dims.
@@ -503,7 +503,7 @@ AffineApplyNormalizer::AffineApplyNormalizer(AffineMap map,
     // 2. Compose AffineApplyOps and dispatch dims or symbols.
     for (unsigned i = 0, e = operands.size(); i < e; ++i) {
       auto t = operands[i];
-      auto affineApply = dyn_cast_or_null<AffineApplyOp>(t->getDefiningOp());
+      auto affineApply = dyn_cast_or_null<AffineApplyOp>(t.getDefiningOp());
       if (affineApply) {
         // a. Compose affine.apply operations.
         LLVM_DEBUG(affineApply.getOperation()->print(
@@ -588,7 +588,7 @@ static void composeAffineMapAndOperands(AffineMap *map,
 void mlir::fullyComposeAffineMapAndOperands(AffineMap *map,
                                             SmallVectorImpl<Value> *operands) {
   while (llvm::any_of(*operands, [](Value v) {
-    return isa_and_nonnull<AffineApplyOp>(v->getDefiningOp());
+    return isa_and_nonnull<AffineApplyOp>(v.getDefiningOp());
   })) {
     composeAffineMapAndOperands(map, operands);
   }
@@ -819,8 +819,8 @@ void AffineApplyOp::getCanonicalizationPatterns(
 static LogicalResult foldMemRefCast(Operation *op) {
   bool folded = false;
   for (OpOperand &operand : op->getOpOperands()) {
-    auto cast = dyn_cast_or_null<MemRefCastOp>(operand.get()->getDefiningOp());
-    if (cast && !cast.getOperand()->getType().isa<UnrankedMemRefType>()) {
+    auto cast = dyn_cast_or_null<MemRefCastOp>(operand.get().getDefiningOp());
+    if (cast && !cast.getOperand().getType().isa<UnrankedMemRefType>()) {
       operand.set(cast.getOperand());
       folded = true;
     }
@@ -856,16 +856,16 @@ void AffineDmaStartOp::build(Builder *builder, OperationState &result,
 }
 
 void AffineDmaStartOp::print(OpAsmPrinter &p) {
-  p << "affine.dma_start " << *getSrcMemRef() << '[';
+  p << "affine.dma_start " << getSrcMemRef() << '[';
   p.printAffineMapOfSSAIds(getSrcMapAttr(), getSrcIndices());
-  p << "], " << *getDstMemRef() << '[';
+  p << "], " << getDstMemRef() << '[';
   p.printAffineMapOfSSAIds(getDstMapAttr(), getDstIndices());
-  p << "], " << *getTagMemRef() << '[';
+  p << "], " << getTagMemRef() << '[';
   p.printAffineMapOfSSAIds(getTagMapAttr(), getTagIndices());
-  p << "], " << *getNumElements();
+  p << "], " << getNumElements();
   if (isStrided()) {
-    p << ", " << *getStride();
-    p << ", " << *getNumElementsPerStride();
+    p << ", " << getStride();
+    p << ", " << getNumElementsPerStride();
   }
   p << " : " << getSrcMemRefType() << ", " << getDstMemRefType() << ", "
     << getTagMemRefType();
@@ -951,11 +951,11 @@ ParseResult AffineDmaStartOp::parse(OpAsmParser &parser,
 }
 
 LogicalResult AffineDmaStartOp::verify() {
-  if (!getOperand(getSrcMemRefOperandIndex())->getType().isa<MemRefType>())
+  if (!getOperand(getSrcMemRefOperandIndex()).getType().isa<MemRefType>())
     return emitOpError("expected DMA source to be of memref type");
-  if (!getOperand(getDstMemRefOperandIndex())->getType().isa<MemRefType>())
+  if (!getOperand(getDstMemRefOperandIndex()).getType().isa<MemRefType>())
     return emitOpError("expected DMA destination to be of memref type");
-  if (!getOperand(getTagMemRefOperandIndex())->getType().isa<MemRefType>())
+  if (!getOperand(getTagMemRefOperandIndex()).getType().isa<MemRefType>())
     return emitOpError("expected DMA tag to be of memref type");
 
   // DMAs from different memory spaces supported.
@@ -971,19 +971,19 @@ LogicalResult AffineDmaStartOp::verify() {
   }
 
   for (auto idx : getSrcIndices()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("src index to dma_start must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("src index must be a dimension or symbol identifier");
   }
   for (auto idx : getDstIndices()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("dst index to dma_start must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("dst index must be a dimension or symbol identifier");
   }
   for (auto idx : getTagIndices()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("tag index to dma_start must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("tag index must be a dimension or symbol identifier");
@@ -1012,12 +1012,12 @@ void AffineDmaWaitOp::build(Builder *builder, OperationState &result,
 }
 
 void AffineDmaWaitOp::print(OpAsmPrinter &p) {
-  p << "affine.dma_wait " << *getTagMemRef() << '[';
+  p << "affine.dma_wait " << getTagMemRef() << '[';
   SmallVector<Value, 2> operands(getTagIndices());
   p.printAffineMapOfSSAIds(getTagMapAttr(), operands);
   p << "], ";
   p.printOperand(getNumElements());
-  p << " : " << getTagMemRef()->getType();
+  p << " : " << getTagMemRef().getType();
 }
 
 // Parse AffineDmaWaitOp.
@@ -1056,10 +1056,10 @@ ParseResult AffineDmaWaitOp::parse(OpAsmParser &parser,
 }
 
 LogicalResult AffineDmaWaitOp::verify() {
-  if (!getOperand(0)->getType().isa<MemRefType>())
+  if (!getOperand(0).getType().isa<MemRefType>())
     return emitOpError("expected DMA tag to be of memref type");
   for (auto idx : getTagIndices()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("index to dma_wait must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("index must be a dimension or symbol identifier");
@@ -1123,8 +1123,7 @@ static LogicalResult verify(AffineForOp op) {
   // Check that the body defines as single block argument for the induction
   // variable.
   auto *body = op.getBody();
-  if (body->getNumArguments() != 1 ||
-      !body->getArgument(0)->getType().isIndex())
+  if (body->getNumArguments() != 1 || !body->getArgument(0).getType().isIndex())
     return op.emitOpError(
         "expected body to have a single index argument for the "
         "induction variable");
@@ -1553,7 +1552,7 @@ bool AffineForOp::matchingBoundOperandList() {
 Region &AffineForOp::getLoopBody() { return region(); }
 
 bool AffineForOp::isDefinedOutsideOfLoop(Value value) {
-  return !region().isAncestor(value->getParentRegion());
+  return !region().isAncestor(value.getParentRegion());
 }
 
 LogicalResult AffineForOp::moveOutOfLoop(ArrayRef<Operation *> ops) {
@@ -1571,9 +1570,9 @@ bool mlir::isForInductionVar(Value val) {
 /// not an induction variable, then return nullptr.
 AffineForOp mlir::getForInductionVarOwner(Value val) {
   auto ivArg = val.dyn_cast<BlockArgument>();
-  if (!ivArg || !ivArg->getOwner())
+  if (!ivArg || !ivArg.getOwner())
     return AffineForOp();
-  auto *containingInst = ivArg->getOwner()->getParent()->getParentOp();
+  auto *containingInst = ivArg.getOwner()->getParent()->getParentOp();
   return dyn_cast<AffineForOp>(containingInst);
 }
 
@@ -1744,7 +1743,7 @@ void AffineLoadOp::build(Builder *builder, OperationState &result,
   result.addOperands(operands);
   if (map)
     result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
-  auto memrefType = operands[0]->getType().cast<MemRefType>();
+  auto memrefType = operands[0].getType().cast<MemRefType>();
   result.types.push_back(memrefType.getElementType());
 }
 
@@ -1753,14 +1752,14 @@ void AffineLoadOp::build(Builder *builder, OperationState &result, Value memref,
   assert(map.getNumInputs() == mapOperands.size() && "inconsistent index info");
   result.addOperands(memref);
   result.addOperands(mapOperands);
-  auto memrefType = memref->getType().cast<MemRefType>();
+  auto memrefType = memref.getType().cast<MemRefType>();
   result.addAttribute(getMapAttrName(), AffineMapAttr::get(map));
   result.types.push_back(memrefType.getElementType());
 }
 
 void AffineLoadOp::build(Builder *builder, OperationState &result, Value memref,
                          ValueRange indices) {
-  auto memrefType = memref->getType().cast<MemRefType>();
+  auto memrefType = memref.getType().cast<MemRefType>();
   auto rank = memrefType.getRank();
   // Create identity map for memrefs with at least one dimension or () -> ()
   // for zero-dimensional memrefs.
@@ -1789,7 +1788,7 @@ ParseResult AffineLoadOp::parse(OpAsmParser &parser, OperationState &result) {
 }
 
 void AffineLoadOp::print(OpAsmPrinter &p) {
-  p << "affine.load " << *getMemRef() << '[';
+  p << "affine.load " << getMemRef() << '[';
   if (AffineMapAttr mapAttr = getAttrOfType<AffineMapAttr>(getMapAttrName()))
     p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
   p << ']';
@@ -1816,7 +1815,7 @@ LogicalResult AffineLoadOp::verify() {
   }
 
   for (auto idx : getMapOperands()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("index to load must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("index must be a dimension or symbol identifier");
@@ -1854,7 +1853,7 @@ void AffineStoreOp::build(Builder *builder, OperationState &result,
 void AffineStoreOp::build(Builder *builder, OperationState &result,
                           Value valueToStore, Value memref,
                           ValueRange indices) {
-  auto memrefType = memref->getType().cast<MemRefType>();
+  auto memrefType = memref.getType().cast<MemRefType>();
   auto rank = memrefType.getRank();
   // Create identity map for memrefs with at least one dimension or () -> ()
   // for zero-dimensional memrefs.
@@ -1885,8 +1884,8 @@ ParseResult AffineStoreOp::parse(OpAsmParser &parser, OperationState &result) {
 }
 
 void AffineStoreOp::print(OpAsmPrinter &p) {
-  p << "affine.store " << *getValueToStore();
-  p << ", " << *getMemRef() << '[';
+  p << "affine.store " << getValueToStore();
+  p << ", " << getMemRef() << '[';
   if (AffineMapAttr mapAttr = getAttrOfType<AffineMapAttr>(getMapAttrName()))
     p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
   p << ']';
@@ -1896,7 +1895,7 @@ void AffineStoreOp::print(OpAsmPrinter &p) {
 
 LogicalResult AffineStoreOp::verify() {
   // First operand must have same type as memref element type.
-  if (getValueToStore()->getType() != getMemRefType().getElementType())
+  if (getValueToStore().getType() != getMemRefType().getElementType())
     return emitOpError("first operand must have same type memref element type");
 
   auto mapAttr = getAttrOfType<AffineMapAttr>(getMapAttrName());
@@ -1914,7 +1913,7 @@ LogicalResult AffineStoreOp::verify() {
   }
 
   for (auto idx : getMapOperands()) {
-    if (!idx->getType().isIndex())
+    if (!idx.getType().isIndex())
       return emitOpError("index to store must have 'index' type");
     if (!isValidAffineIndexOperand(idx))
       return emitOpError("index must be a dimension or symbol identifier");
@@ -2059,7 +2058,7 @@ static ParseResult parseAffinePrefetchOp(OpAsmParser &parser,
 }
 
 void print(OpAsmPrinter &p, AffinePrefetchOp op) {
-  p << AffinePrefetchOp::getOperationName() << " " << *op.memref() << '[';
+  p << AffinePrefetchOp::getOperationName() << " " << op.memref() << '[';
   AffineMapAttr mapAttr = op.getAttrOfType<AffineMapAttr>(op.getMapAttrName());
   if (mapAttr) {
     SmallVector<Value, 2> operands(op.getMapOperands());