diff options
Diffstat (limited to 'mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp')
| -rw-r--r-- | mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp | 19 |
1 files changed, 5 insertions, 14 deletions
diff --git a/mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp b/mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp index 2b15637ae14..38037c2596b 100644 --- a/mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp +++ b/mlir/lib/Conversion/VectorToLLVM/VectorToLLVM.cpp @@ -49,16 +49,6 @@ static LLVM::LLVMType getPtrToElementType(T containerType, .getPointerTo(); } -// Create an array attribute containing integer attributes with values provided -// in `position`. -static ArrayAttr positionAttr(Builder &builder, ArrayRef<int> position) { - SmallVector<Attribute, 4> attrs; - attrs.reserve(position.size()); - for (auto p : position) - attrs.push_back(builder.getI64IntegerAttr(p)); - return builder.getArrayAttr(attrs); -} - class ExtractElementOpConversion : public LLVMOpLowering { public: explicit ExtractElementOpConversion(MLIRContext *context, @@ -148,16 +138,17 @@ public: aD = rewriter.create<LLVM::ShuffleVectorOp>(loc, a, a, bcastArrayAttr); // 2. If acc is present, extract 1-d vector acc[d] into accD. if (acc) - accD = rewriter.create<LLVM::ExtractValueOp>(loc, vRHS, acc, - positionAttr(rewriter, d)); + accD = rewriter.create<LLVM::ExtractValueOp>( + loc, vRHS, acc, rewriter.getI64ArrayAttr(d)); // 3. Compute aD outer b (plus accD, if relevant). Value *aOuterbD = accD ? rewriter.create<LLVM::fmuladd>(loc, vRHS, aD, b, accD) .getResult() : rewriter.create<LLVM::FMulOp>(loc, aD, b).getResult(); // 4. Insert as value `d` in the descriptor. - desc = rewriter.create<LLVM::InsertValueOp>( - loc, llvmArrayOfVectType, desc, aOuterbD, positionAttr(rewriter, d)); + desc = rewriter.create<LLVM::InsertValueOp>(loc, llvmArrayOfVectType, + desc, aOuterbD, + rewriter.getI64ArrayAttr(d)); } rewriter.replaceOp(op, desc); return matchSuccess(); |
