diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/inline-asm.ll | 10 |
2 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp index c1358f771b3..23bea351501 100644 --- a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp @@ -357,6 +357,9 @@ void AMDGPUInstPrinter::printRegOperand(unsigned RegNo, raw_ostream &O, } else if (MRI.getRegClass(AMDGPU::VReg_96RegClassID).contains(RegNo)) { O << 'v'; NumRegs = 3; + } else if (MRI.getRegClass(AMDGPU::SReg_96RegClassID).contains(RegNo)) { + O << 's'; + NumRegs = 3; } else if (MRI.getRegClass(AMDGPU::VReg_160RegClassID).contains(RegNo)) { O << 'v'; NumRegs = 5; diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm.ll b/llvm/test/CodeGen/AMDGPU/inline-asm.ll index 9615efaaa93..6a97626c7b0 100644 --- a/llvm/test/CodeGen/AMDGPU/inline-asm.ll +++ b/llvm/test/CodeGen/AMDGPU/inline-asm.ll @@ -267,3 +267,13 @@ entry: tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1 ret void } + +; Make sure tuples of 3 SGPRs are printed with the [] syntax instead +; of the tablegen default. +; CHECK-LABEL: {{^}}sgpr96_name_format: +; CHECK: ; sgpr96 s[0:2] +define amdgpu_kernel void @sgpr96_name_format() { +entry: + tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1 + ret void +} |
