diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/include/llvm/Target/Target.td | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp | 5 |
3 files changed, 4 insertions, 5 deletions
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td index 7dc2aec324e..a92dcf1dd4a 100644 --- a/llvm/include/llvm/Target/Target.td +++ b/llvm/include/llvm/Target/Target.td @@ -893,7 +893,7 @@ def PHI : Instruction { let OutOperandList = (outs unknown:$dst); let InOperandList = (ins variable_ops); let AsmString = "PHINODE"; - let hasSideEffects = 1; + let hasSideEffects = 0; } def INLINEASM : Instruction { let OutOperandList = (outs); diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 2c81218f8f6..478a92e22fc 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1686,7 +1686,7 @@ bool MachineInstr::isSafeToMove(AliasAnalysis *AA, bool &SawStore) const { // Treat volatile loads as stores. This is not strictly necessary for // volatiles, but it is required for atomic loads. It is not allowed to move // a load across an atomic load with Ordering > Monotonic. - if (mayStore() || isCall() || + if (mayStore() || isCall() || isPHI() || (mayLoad() && hasOrderedMemoryRef())) { SawStore = true; return false; diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp index fe709934160..033718039f9 100644 --- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp +++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp @@ -1315,7 +1315,7 @@ bool RedundantInstrElimination::processBlock(MachineBasicBlock &B, if (MI->getOpcode() == TargetOpcode::COPY) continue; - if (MI->hasUnmodeledSideEffects() || MI->isInlineAsm()) + if (MI->isPHI() || MI->hasUnmodeledSideEffects() || MI->isInlineAsm()) continue; unsigned NumD = MI->getDesc().getNumDefs(); if (NumD != 1) @@ -1325,8 +1325,7 @@ bool RedundantInstrElimination::processBlock(MachineBasicBlock &B, if (!BT.has(RD.Reg)) continue; const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg); - auto At = MI->isPHI() ? B.getFirstNonPHI() - : MachineBasicBlock::iterator(MI); + auto At = MachineBasicBlock::iterator(MI); // Find a source operand that is equal to the result. for (auto &Op : MI->uses()) { |
