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-rw-r--r--llvm/lib/Target/X86/X86.td30
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.cpp14
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.h20
3 files changed, 59 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
index 6856bd21670..19055693789 100644
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -307,6 +307,18 @@ def ProcIntelSLM : SubtargetFeature<"slm", "X86ProcFamily", "IntelSLM",
"Intel Silvermont processors">;
def ProcIntelGLM : SubtargetFeature<"glm", "X86ProcFamily", "IntelGLM",
"Intel Goldmont processors">;
+def ProcIntelHSW : SubtargetFeature<"haswell", "X86ProcFamily",
+ "IntelHaswell", "Intel Haswell processors">;
+def ProcIntelBDW : SubtargetFeature<"broadwell", "X86ProcFamily",
+ "IntelBroadwell", "Intel Broadwell processors">;
+def ProcIntelSKL : SubtargetFeature<"skylake", "X86ProcFamily",
+ "IntelSkylake", "Intel Skylake processors">;
+def ProcIntelKNL : SubtargetFeature<"knl", "X86ProcFamily",
+ "IntelKNL", "Intel Knights Landing processors">;
+def ProcIntelSKX : SubtargetFeature<"skx", "X86ProcFamily",
+ "IntelSKX", "Intel Skylake Server processors">;
+def ProcIntelCNL : SubtargetFeature<"cannonlake", "X86ProcFamily",
+ "IntelCannonlake", "Intel Cannonlake processors">;
class Proc<string Name, list<SubtargetFeature> Features>
: ProcessorModel<Name, GenericModel, Features>;
@@ -565,11 +577,14 @@ def HSWFeatures : ProcessorFeatures<IVBFeatures.Value, [
]>;
class HaswellProc<string Name> : ProcModel<Name, HaswellModel,
- HSWFeatures.Value, []>;
+ HSWFeatures.Value, [
+ ProcIntelHSW
+ ]>;
def : HaswellProc<"haswell">;
def : HaswellProc<"core-avx2">; // Legacy alias.
def BDWFeatures : ProcessorFeatures<HSWFeatures.Value, [
+ ProcIntelBDW,
FeatureADX,
FeatureRDSEED
]>;
@@ -589,12 +604,15 @@ def SKLFeatures : ProcessorFeatures<BDWFeatures.Value, [
// FIXME: define SKL model
class SkylakeClientProc<string Name> : ProcModel<Name, HaswellModel,
- SKLFeatures.Value, []>;
+ SKLFeatures.Value, [
+ ProcIntelSKL
+ ]>;
def : SkylakeClientProc<"skylake">;
// FIXME: define KNL model
class KnightsLandingProc<string Name> : ProcModel<Name, HaswellModel,
IVBFeatures.Value, [
+ ProcIntelKNL,
FeatureAVX512,
FeatureERI,
FeatureCDI,
@@ -624,7 +642,9 @@ def SKXFeatures : ProcessorFeatures<SKLFeatures.Value, [
// FIXME: define SKX model
class SkylakeServerProc<string Name> : ProcModel<Name, HaswellModel,
- SKXFeatures.Value, []>;
+ SKXFeatures.Value, [
+ ProcIntelSKX
+ ]>;
def : SkylakeServerProc<"skylake-avx512">;
def : SkylakeServerProc<"skx">; // Legacy alias.
@@ -635,7 +655,9 @@ def CNLFeatures : ProcessorFeatures<SKXFeatures.Value, [
]>;
class CannonlakeProc<string Name> : ProcModel<Name, HaswellModel,
- CNLFeatures.Value, []>;
+ CNLFeatures.Value, [
+ ProcIntelCNL
+ ]>;
def : CannonlakeProc<"cannonlake">;
// AMD CPUs.
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 2a7733996c4..13062ca8cfe 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -283,6 +283,17 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
isTargetKFreeBSD() || In64BitMode)
stackAlignment = 16;
+
+ // Gather is available since Haswell (AVX2 set). So technically, we can generate Gathers
+ // on all AVX2 processors. But the overhead on HSW is high. Skylake Client processor has
+ // faster Gathers than HSW and performance is similar to Skylake Server (AVX-512).
+ // The specified overhead is relative to the Load operation."2" is the number provided
+ // by Intel architects, This parameter is used for cost estimation of Gather Op and
+ // comparison with other alternatives.
+ if (X86ProcFamily == IntelSkylake || hasAVX512())
+ GatherOverhead = 2;
+ if (hasAVX512())
+ ScatterOverhead = 2;
}
void X86Subtarget::initializeEnvironment() {
@@ -361,6 +372,9 @@ void X86Subtarget::initializeEnvironment() {
// FIXME: this is a known good value for Yonah. How about others?
MaxInlineSizeThreshold = 128;
UseSoftFloat = false;
+ X86ProcFamily = Others;
+ GatherOverhead = 1024;
+ ScatterOverhead = 1024;
}
X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 7c85e9c2eee..61fa9252770 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -61,7 +61,16 @@ protected:
};
enum X86ProcFamilyEnum {
- Others, IntelAtom, IntelSLM, IntelGLM
+ Others,
+ IntelAtom,
+ IntelSLM,
+ IntelGLM,
+ IntelHaswell,
+ IntelBroadwell,
+ IntelSkylake,
+ IntelKNL,
+ IntelSKX,
+ IntelCannonlake
};
/// X86 processor family: Intel Atom, and others
@@ -339,6 +348,10 @@ private:
/// True if compiling for 16-bit, false for 32-bit or 64-bit.
bool In16BitMode;
+ /// Contains the Overhead of gather\scatter instructions
+ int GatherOverhead;
+ int ScatterOverhead;
+
X86SelectionDAGInfo TSInfo;
// Ordering here is important. X86InstrInfo initializes X86RegisterInfo which
// X86TargetLowering needs.
@@ -481,6 +494,8 @@ public:
bool isPMULLDSlow() const { return IsPMULLDSlow; }
bool isUnalignedMem16Slow() const { return IsUAMem16Slow; }
bool isUnalignedMem32Slow() const { return IsUAMem32Slow; }
+ int getGatherOverhead() const { return GatherOverhead; }
+ int getScatterOverhead() const { return ScatterOverhead; }
bool hasSSEUnalignedMem() const { return HasSSEUnalignedMem; }
bool hasCmpxchg16b() const { return HasCmpxchg16b; }
bool useLeaForSP() const { return UseLeaForSP; }
@@ -515,6 +530,9 @@ public:
bool isXRaySupported() const override { return is64Bit(); }
+ X86ProcFamilyEnum getProcFamily() const { return X86ProcFamily; }
+
+ /// TODO: to be removed later and replaced with suitable properties
bool isAtom() const { return X86ProcFamily == IntelAtom; }
bool isSLM() const { return X86ProcFamily == IntelSLM; }
bool useSoftFloat() const { return UseSoftFloat; }
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