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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
-rw-r--r--llvm/test/CodeGen/ARM/select.ll12
2 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 1b73b0711ea..7b878688df6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -7500,10 +7500,13 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1,
SDValue Cond = DAG.getSetCC(DL,
TLI.getSetCCResultType(N0.getValueType()),
N0, N1, CC);
+ AddToWorkList(Cond.getNode());
SDValue CstOffset = DAG.getNode(ISD::SELECT, DL, Zero.getValueType(),
Cond, One, Zero);
+ AddToWorkList(CstOffset.getNode());
CPIdx = DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(), CPIdx,
CstOffset);
+ AddToWorkList(CPIdx.getNode());
return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(), false,
false, Alignment);
diff --git a/llvm/test/CodeGen/ARM/select.ll b/llvm/test/CodeGen/ARM/select.ll
index a19c04452a7..f1bd7ee53f8 100644
--- a/llvm/test/CodeGen/ARM/select.ll
+++ b/llvm/test/CodeGen/ARM/select.ll
@@ -76,12 +76,12 @@ define double @f7(double %a, double %b) {
; block generated, odds are good that we have close to the ideal code for this:
;
; CHECK-NEON: _f8:
-; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123
-; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0
-; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]]
-; CHECK-NEON-NEXT: it eq
-; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4
-; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], LCPI
+; CHECK-NEON: adr r2, LCPI7_0
+; CHECK-NEON-NEXT: movw r3, #1123
+; CHECK-NEON-NEXT: adds r1, r2, #4
+; CHECK-NEON-NEXT: cmp r0, r3
+; CHECK-NEON-NEXT: it ne
+; CHECK-NEON-NEXT: movne r1, r2
; CHECK-NEON-NEXT: ldr
; CHECK-NEON: bx
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