diff options
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/X86/X86Instr3DNow.td | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrMMX.td | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/3dnow-schedule.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/mmx-schedule.ll | 10 |
4 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86Instr3DNow.td b/llvm/lib/Target/X86/X86Instr3DNow.td index 0d30b7d47f3..d2e5980718e 100644 --- a/llvm/lib/Target/X86/X86Instr3DNow.td +++ b/llvm/lib/Target/X86/X86Instr3DNow.td @@ -113,6 +113,8 @@ defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr", I3DNOW_FALU_ITINS, 1>; defm PI2FD : I3DNow_conv_rm_int<0x0D, "pi2fd", I3DNOW_FCVT_I2F_ITINS>; defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", I3DNOW_MISC_FUNC_ITINS, 1>; +// FIXME: Is there a better scheduler class for EMMS/FEMMS? +let SchedRW = [WriteMicrocoded] in def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms", [(int_x86_mmx_femms)], IIC_MMX_EMMS>; diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index f6bff658e56..46dfdb9e319 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -221,6 +221,8 @@ multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC, // MMX EMMS Instruction //===----------------------------------------------------------------------===// +// FIXME: Is there a better scheduler class for EMMS/FEMMS? +let SchedRW = [WriteMicrocoded] in def MMX_EMMS : MMXI<0x77, RawFrm, (outs), (ins), "emms", [(int_x86_mmx_emms)], IIC_MMX_EMMS>; diff --git a/llvm/test/CodeGen/X86/3dnow-schedule.ll b/llvm/test/CodeGen/X86/3dnow-schedule.ll index 7a5464bf285..d45433922fb 100644 --- a/llvm/test/CodeGen/X86/3dnow-schedule.ll +++ b/llvm/test/CodeGen/X86/3dnow-schedule.ll @@ -4,7 +4,7 @@ define void @test_femms() optsize { ; CHECK-LABEL: test_femms: ; CHECK: # %bb.0: -; CHECK-NEXT: femms +; CHECK-NEXT: femms # sched: [100:0.33] ; CHECK-NEXT: retq # sched: [1:1.00] call void @llvm.x86.mmx.femms() ret void diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll index 8e540737c64..29d6a471016 100644 --- a/llvm/test/CodeGen/X86/mmx-schedule.ll +++ b/llvm/test/CodeGen/X86/mmx-schedule.ll @@ -526,7 +526,7 @@ declare x86_mmx @llvm.x86.sse.cvttps2pi(<4 x float>) nounwind readnone define void @test_emms() optsize { ; GENERIC-LABEL: test_emms: ; GENERIC: # %bb.0: -; GENERIC-NEXT: emms +; GENERIC-NEXT: emms # sched: [100:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; ATOM-LABEL: test_emms: @@ -536,12 +536,12 @@ define void @test_emms() optsize { ; ; SLM-LABEL: test_emms: ; SLM: # %bb.0: -; SLM-NEXT: emms +; SLM-NEXT: emms # sched: [100:1.00] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_emms: ; SANDY: # %bb.0: -; SANDY-NEXT: emms +; SANDY-NEXT: emms # sched: [100:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: test_emms: @@ -566,12 +566,12 @@ define void @test_emms() optsize { ; ; BTVER2-LABEL: test_emms: ; BTVER2: # %bb.0: -; BTVER2-NEXT: emms +; BTVER2-NEXT: emms # sched: [100:0.17] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_emms: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: emms +; ZNVER1-NEXT: emms # sched: [100:?] ; ZNVER1-NEXT: retq # sched: [1:0.50] call void @llvm.x86.mmx.emms() ret void |