summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstrInfo.td2
-rw-r--r--llvm/test/MC/AArch64/basic-a64-instructions.s3
2 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 6d4cb2deebd..fa1a46acba8 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -894,6 +894,8 @@ def REVXr : OneXRegData<0b011, "rev", bswap>;
def REV32Xr : OneXRegData<0b010, "rev32",
UnOpFrag<(rotr (bswap node:$LHS), (i64 32))>>;
+def : InstAlias<"rev64 $Rd, $Rn", (REVXr GPR64:$Rd, GPR64:$Rn), 0>;
+
// The bswap commutes with the rotr so we want a pattern for both possible
// orders.
def : Pat<(bswap (rotr GPR32:$Rn, (i64 16))), (REV16Wr GPR32:$Rn)>;
diff --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s
index 5d33a4f933b..f8e49432145 100644
--- a/llvm/test/MC/AArch64/basic-a64-instructions.s
+++ b/llvm/test/MC/AArch64/basic-a64-instructions.s
@@ -1489,6 +1489,9 @@ _func:
// CHECK: clz w24, wzr // encoding: [0xf8,0x13,0xc0,0x5a]
// CHECK: rev x22, xzr // encoding: [0xf6,0x0f,0xc0,0xda]
+ rev64 x13, x12
+// CHECK: rev x13, x12 // encoding: [0x8d,0x0d,0xc0,0xda]
+
//------------------------------------------------------------------------------
// Data-processing (2 source)
//------------------------------------------------------------------------------
OpenPOWER on IntegriCloud