diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/thumb1_return_sequence.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/v8m-tail-call.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll | 2 |
4 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index b38034d9039..ba00b3d79da 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -647,7 +647,7 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB, BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRspi)) .addReg(PopReg, RegState::Define) .addReg(ARM::SP) - .addImm(MBBI->getNumOperands() - 3) + .addImm(MBBI->getNumExplicitOperands() - 2) .add(predOps(ARMCC::AL)); // Move from the temporary register to the LR. BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr)) diff --git a/llvm/test/CodeGen/ARM/thumb1_return_sequence.ll b/llvm/test/CodeGen/ARM/thumb1_return_sequence.ll index c8ab6b5042e..11e18f1347a 100644 --- a/llvm/test/CodeGen/ARM/thumb1_return_sequence.ll +++ b/llvm/test/CodeGen/ARM/thumb1_return_sequence.ll @@ -25,7 +25,7 @@ entry: ; -------- ; Stack realignment means sp is restored from frame pointer ; CHECK-V4T: mov sp -; CHECK-V4T-NEXT: ldr [[POP:r[4567]]], [sp, #{{.*}}] +; CHECK-V4T-NEXT: ldr [[POP:r[4567]]], [sp, #16] ; CHECK-V4T-NEXT: mov lr, [[POP]] ; CHECK-V4T-NEXT: pop {[[SAVED]]} ; CHECK-V4T-NEXT add sp, sp, #4 @@ -57,14 +57,14 @@ entry: ; Epilogue ; -------- -; CHECK-V4T: ldr [[POP:r[4567]]], [sp, #{{.*}}] +; CHECK-V4T: ldr [[POP:r[4567]]], [sp, #12] ; CHECK-V4T-NEXT: mov lr, [[POP]] ; CHECK-V4T-NEXT: pop {[[SAVED]]} ; CHECK-V4T-NEXT: add sp, #16 ; CHECK-V4T-NEXT: bx lr ; CHECK-V5T: lsls r4 ; CHECK-V5T-NEXT: mov sp, r4 -; CHECK-V5T: ldr [[POP:r[4567]]], [sp, #{{.*}}] +; CHECK-V5T: ldr [[POP:r[4567]]], [sp, #12] ; CHECK-V5T-NEXT: mov lr, [[POP]] ; CHECK-V5T-NEXT: pop {[[SAVED]]} ; CHECK-V5T-NEXT: add sp, #16 diff --git a/llvm/test/CodeGen/ARM/v8m-tail-call.ll b/llvm/test/CodeGen/ARM/v8m-tail-call.ll index 74a6c20ac54..c369df0c022 100644 --- a/llvm/test/CodeGen/ARM/v8m-tail-call.ll +++ b/llvm/test/CodeGen/ARM/v8m-tail-call.ll @@ -8,7 +8,7 @@ define hidden i32 @f0() { %2 = tail call i32 @h0(i32 %1, i32 1, i32 2, i32 3) ret i32 %2 ; CHECK-LABEL: f0 -; CHECK: ldr [[POP:r[4567]]], [sp +; CHECK: ldr [[POP:r[4567]]], [sp, #4] ; CHECK-NEXT: mov lr, [[POP]] ; CHECK-NEXT: pop {{.*}}[[POP]] ; CHECK-NEXT: add sp, #4 @@ -39,7 +39,7 @@ define hidden i32 @f2(i32, i32, i32, i32, i32) { %11 = phi i32 [ %9, %8 ], [ -1, %5 ] ret i32 %11 ; CHECK-LABEL: f2 -; CHECK: ldr [[POP:r[4567]]], [sp +; CHECK: ldr [[POP:r[4567]]], [sp, #12] ; CHECK-NEXT: mov lr, [[POP]] ; CHECK-NEXT: pop {{.*}}[[POP]] ; CHECK-NEXT: add sp, #4 diff --git a/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll b/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll index 6bb5c81485b..07d724546e9 100644 --- a/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll +++ b/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll @@ -647,7 +647,7 @@ define i1 @beq_to_bx(i32* %y, i32 %head) { ; ENABLE: push {r4, lr} ; CHECK: tst r3, r4 -; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #8] +; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #4] ; ENABLE-NEXT: mov lr, [[POP]] ; ENABLE-NEXT: pop {[[POP]]} ; ENABLE-NEXT: add sp, #4 |
