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-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp11
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h3
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp8
-rw-r--r--llvm/test/MC/ARM/arm_fixups.s7
-rw-r--r--llvm/test/MC/ARM/modified-immediate-fixup-error.s14
-rw-r--r--llvm/test/MC/ARM/modified-immediate-fixup.s15
6 files changed, 52 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index a0402d9b740..17856452b7c 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -95,6 +95,7 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"fixup_arm_movw_lo16", 0, 20, 0},
{"fixup_t2_movt_hi16", 0, 20, 0},
{"fixup_t2_movw_lo16", 0, 20, 0},
+ {"fixup_arm_mod_imm", 0, 12, 0},
};
const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = {
// This table *must* be in the order that the fixup_* kinds are defined in
@@ -142,6 +143,7 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"fixup_arm_movw_lo16", 12, 20, 0},
{"fixup_t2_movt_hi16", 12, 20, 0},
{"fixup_t2_movw_lo16", 12, 20, 0},
+ {"fixup_arm_mod_imm", 20, 12, 0},
};
if (Kind < FirstTargetFixupKind)
@@ -665,6 +667,13 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
return Value;
}
+ case ARM::fixup_arm_mod_imm:
+ Value = ARM_AM::getSOImmVal(Value);
+ if (Ctx && Value >> 12) {
+ Ctx->reportError(Fixup.getLoc(), "out of range immediate fixup value");
+ return 0;
+ }
+ return Value;
}
}
@@ -731,6 +740,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
case FK_Data_2:
case ARM::fixup_arm_thumb_br:
case ARM::fixup_arm_thumb_cb:
+ case ARM::fixup_arm_mod_imm:
return 2;
case ARM::fixup_arm_pcrel_10_unscaled:
@@ -809,6 +819,7 @@ static unsigned getFixupKindContainerSizeBytes(unsigned Kind) {
case ARM::fixup_arm_movw_lo16:
case ARM::fixup_t2_movt_hi16:
case ARM::fixup_t2_movw_lo16:
+ case ARM::fixup_arm_mod_imm:
// Instruction size is 4 bytes.
return 4;
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
index 51dbe1449b6..3fe2302bdd3 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
@@ -107,6 +107,9 @@ enum Fixups {
fixup_t2_movt_hi16, // :upper16:
fixup_t2_movw_lo16, // :lower16:
+ // fixup_arm_mod_imm - Fixup for mod_imm
+ fixup_arm_mod_imm,
+
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index 0a6c7a999cb..901ab45c2dc 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -317,12 +317,8 @@ public:
// Support for fixups (MCFixup)
if (MO.isExpr()) {
const MCExpr *Expr = MO.getExpr();
- // In instruction code this value always encoded as lowest 12 bits,
- // so we don't have to perform any specific adjustments.
- // Due to requirements of relocatable records we have to use FK_Data_4.
- // See ARMELFObjectWriter::ExplicitRelSym and
- // ARMELFObjectWriter::GetRelocTypeInner for more details.
- MCFixupKind Kind = MCFixupKind(FK_Data_4);
+ // Fixups resolve to plain values that need to be encoded.
+ MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_mod_imm);
Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
return 0;
}
diff --git a/llvm/test/MC/ARM/arm_fixups.s b/llvm/test/MC/ARM/arm_fixups.s
index 1f56e128524..a7655092a7a 100644
--- a/llvm/test/MC/ARM/arm_fixups.s
+++ b/llvm/test/MC/ARM/arm_fixups.s
@@ -32,3 +32,10 @@
@ CHECK: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
@ CHECK-BE: movw r2, :lower16:fred @ encoding: [0xe3,0b0000AAAA,0x20'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
+
+ add r0, r0, #(L1 - L2)
+
+@ CHECK: add r0, r0, #L1-L2 @ encoding: [A,0b0000AAAA,0x80,0xe2]
+@ CHECK: @ fixup A - offset: 0, value: L1-L2, kind: fixup_arm_mod_imm
+@ CHECK-BE: add r0, r0, #L1-L2 @ encoding: [0xe2,0x80,0b0000AAAA,A]
+@ CHECK-BE: @ fixup A - offset: 0, value: L1-L2, kind: fixup_arm_mod_imm
diff --git a/llvm/test/MC/ARM/modified-immediate-fixup-error.s b/llvm/test/MC/ARM/modified-immediate-fixup-error.s
new file mode 100644
index 00000000000..2d111751cc1
--- /dev/null
+++ b/llvm/test/MC/ARM/modified-immediate-fixup-error.s
@@ -0,0 +1,14 @@
+@ PR24346
+@ RUN: not llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s 2>&1 | FileCheck %s
+
+ .data
+ .align 8
+L2:
+ .word 0
+ .align 8
+ .byte 0
+L1:
+
+ .text
+@ CHECK: error: out of range immediate fixup value
+ add r0, r0, #(L1 - L2)
diff --git a/llvm/test/MC/ARM/modified-immediate-fixup.s b/llvm/test/MC/ARM/modified-immediate-fixup.s
new file mode 100644
index 00000000000..288814b4009
--- /dev/null
+++ b/llvm/test/MC/ARM/modified-immediate-fixup.s
@@ -0,0 +1,15 @@
+@ PR24346
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \
+@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s
+
+ .data
+ .align 8
+L2:
+ .word 0
+ .align 8
+ .word 0
+L1:
+
+ .text
+@ CHECK: add r0, r0, #260
+ add r0, r0, #(L1 - L2)
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