diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/X86/atomic-non-integer.ll | 511 |
1 files changed, 432 insertions, 79 deletions
diff --git a/llvm/test/CodeGen/X86/atomic-non-integer.ll b/llvm/test/CodeGen/X86/atomic-non-integer.ll index bdeeab37fd3..40f159b0b38 100644 --- a/llvm/test/CodeGen/X86/atomic-non-integer.ll +++ b/llvm/test/CodeGen/X86/atomic-non-integer.ll @@ -1,5 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE +; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE +; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefix=X64 ; Note: This test is testing that the lowering for atomics matches what we ; currently emit for non-atomics + the atomic restriction. The presence of @@ -9,99 +11,337 @@ ; and their calling convention which remain unresolved.) define void @store_half(half* %fptr, half %v) { -; CHECK-LABEL: store_half: -; CHECK: # %bb.0: -; CHECK-NEXT: pushq %rbx -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: .cfi_offset %rbx, -16 -; CHECK-NEXT: movq %rdi, %rbx -; CHECK-NEXT: callq __gnu_f2h_ieee -; CHECK-NEXT: movw %ax, (%rbx) -; CHECK-NEXT: popq %rbx -; CHECK-NEXT: .cfi_def_cfa_offset 8 -; CHECK-NEXT: retq +; X86-SSE-LABEL: store_half: +; X86-SSE: # %bb.0: +; X86-SSE-NEXT: pushl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: subl $8, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 16 +; X86-SSE-NEXT: .cfi_offset %esi, -8 +; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-SSE-NEXT: movss %xmm0, (%esp) +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-SSE-NEXT: calll __gnu_f2h_ieee +; X86-SSE-NEXT: movw %ax, (%esi) +; X86-SSE-NEXT: addl $8, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: popl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; X86-NOSSE-LABEL: store_half: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: subl $8, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 16 +; X86-NOSSE-NEXT: .cfi_offset %esi, -8 +; X86-NOSSE-NEXT: flds {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: fstps (%esp) +; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NOSSE-NEXT: calll __gnu_f2h_ieee +; X86-NOSSE-NEXT: movw %ax, (%esi) +; X86-NOSSE-NEXT: addl $8, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: popl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4 +; X86-NOSSE-NEXT: retl +; +; X64-LABEL: store_half: +; X64: # %bb.0: +; X64-NEXT: pushq %rbx +; X64-NEXT: .cfi_def_cfa_offset 16 +; X64-NEXT: .cfi_offset %rbx, -16 +; X64-NEXT: movq %rdi, %rbx +; X64-NEXT: callq __gnu_f2h_ieee +; X64-NEXT: movw %ax, (%rbx) +; X64-NEXT: popq %rbx +; X64-NEXT: .cfi_def_cfa_offset 8 +; X64-NEXT: retq store atomic half %v, half* %fptr unordered, align 2 ret void } define void @store_float(float* %fptr, float %v) { -; CHECK-LABEL: store_float: -; CHECK: # %bb.0: -; CHECK-NEXT: movd %xmm0, %eax -; CHECK-NEXT: movl %eax, (%rdi) -; CHECK-NEXT: retq +; X86-LABEL: store_float: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl %ecx, (%eax) +; X86-NEXT: retl +; +; X64-LABEL: store_float: +; X64: # %bb.0: +; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: movl %eax, (%rdi) +; X64-NEXT: retq store atomic float %v, float* %fptr unordered, align 4 ret void } define void @store_double(double* %fptr, double %v) { -; CHECK-LABEL: store_double: -; CHECK: # %bb.0: -; CHECK-NEXT: movq %xmm0, %rax -; CHECK-NEXT: movq %rax, (%rdi) -; CHECK-NEXT: retq +; X86-LABEL: store_double: +; X86: # %bb.0: +; X86-NEXT: pushl %ebx +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: pushl %esi +; X86-NEXT: .cfi_def_cfa_offset 12 +; X86-NEXT: .cfi_offset %esi, -12 +; X86-NEXT: .cfi_offset %ebx, -8 +; X86-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl (%esi), %eax +; X86-NEXT: movl 4(%esi), %edx +; X86-NEXT: .p2align 4, 0x90 +; X86-NEXT: .LBB2_1: # %atomicrmw.start +; X86-NEXT: # =>This Inner Loop Header: Depth=1 +; X86-NEXT: lock cmpxchg8b (%esi) +; X86-NEXT: jne .LBB2_1 +; X86-NEXT: # %bb.2: # %atomicrmw.end +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: popl %ebx +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl +; +; X64-LABEL: store_double: +; X64: # %bb.0: +; X64-NEXT: movq %xmm0, %rax +; X64-NEXT: movq %rax, (%rdi) +; X64-NEXT: retq store atomic double %v, double* %fptr unordered, align 8 ret void } define void @store_fp128(fp128* %fptr, fp128 %v) { -; CHECK-LABEL: store_fp128: -; CHECK: # %bb.0: -; CHECK-NEXT: pushq %rax -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: callq __sync_lock_test_and_set_16 -; CHECK-NEXT: popq %rax -; CHECK-NEXT: .cfi_def_cfa_offset 8 -; CHECK-NEXT: retq +; X86-LABEL: store_fp128: +; X86: # %bb.0: +; X86-NEXT: subl $36, %esp +; X86-NEXT: .cfi_adjust_cfa_offset 36 +; X86-NEXT: leal {{[0-9]+}}(%esp), %eax +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl %eax +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: calll __sync_lock_test_and_set_16 +; X86-NEXT: .cfi_adjust_cfa_offset -4 +; X86-NEXT: addl $56, %esp +; X86-NEXT: .cfi_adjust_cfa_offset -56 +; X86-NEXT: retl +; +; X64-LABEL: store_fp128: +; X64: # %bb.0: +; X64-NEXT: pushq %rax +; X64-NEXT: .cfi_def_cfa_offset 16 +; X64-NEXT: callq __sync_lock_test_and_set_16 +; X64-NEXT: popq %rax +; X64-NEXT: .cfi_def_cfa_offset 8 +; X64-NEXT: retq store atomic fp128 %v, fp128* %fptr unordered, align 16 ret void } define half @load_half(half* %fptr) { -; CHECK-LABEL: load_half: -; CHECK: # %bb.0: -; CHECK-NEXT: pushq %rax -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: movzwl (%rdi), %edi -; CHECK-NEXT: callq __gnu_h2f_ieee -; CHECK-NEXT: popq %rax -; CHECK-NEXT: .cfi_def_cfa_offset 8 -; CHECK-NEXT: retq +; X86-LABEL: load_half: +; X86: # %bb.0: +; X86-NEXT: subl $12, %esp +; X86-NEXT: .cfi_def_cfa_offset 16 +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movzwl (%eax), %eax +; X86-NEXT: movl %eax, (%esp) +; X86-NEXT: calll __gnu_h2f_ieee +; X86-NEXT: addl $12, %esp +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl +; +; X64-LABEL: load_half: +; X64: # %bb.0: +; X64-NEXT: pushq %rax +; X64-NEXT: .cfi_def_cfa_offset 16 +; X64-NEXT: movzwl (%rdi), %edi +; X64-NEXT: callq __gnu_h2f_ieee +; X64-NEXT: popq %rax +; X64-NEXT: .cfi_def_cfa_offset 8 +; X64-NEXT: retq %v = load atomic half, half* %fptr unordered, align 2 ret half %v } define float @load_float(float* %fptr) { -; CHECK-LABEL: load_float: -; CHECK: # %bb.0: -; CHECK-NEXT: movd (%rdi), %xmm0 -; CHECK-NEXT: retq +; X86-SSE-LABEL: load_float: +; X86-SSE: # %bb.0: +; X86-SSE-NEXT: pushl %eax +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: movd (%eax), %xmm0 +; X86-SSE-NEXT: movd %xmm0, (%esp) +; X86-SSE-NEXT: flds (%esp) +; X86-SSE-NEXT: popl %eax +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; X86-NOSSE-LABEL: load_float: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl %eax +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NOSSE-NEXT: movl (%eax), %eax +; X86-NOSSE-NEXT: movl %eax, (%esp) +; X86-NOSSE-NEXT: flds (%esp) +; X86-NOSSE-NEXT: popl %eax +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4 +; X86-NOSSE-NEXT: retl +; +; X64-LABEL: load_float: +; X64: # %bb.0: +; X64-NEXT: movd (%rdi), %xmm0 +; X64-NEXT: retq %v = load atomic float, float* %fptr unordered, align 4 ret float %v } define double @load_double(double* %fptr) { -; CHECK-LABEL: load_double: -; CHECK: # %bb.0: -; CHECK-NEXT: movq (%rdi), %xmm0 -; CHECK-NEXT: retq +; X86-SSE-LABEL: load_double: +; X86-SSE: # %bb.0: +; X86-SSE-NEXT: pushl %ebx +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: pushl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 12 +; X86-SSE-NEXT: subl $12, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 24 +; X86-SSE-NEXT: .cfi_offset %esi, -12 +; X86-SSE-NEXT: .cfi_offset %ebx, -8 +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-SSE-NEXT: xorl %eax, %eax +; X86-SSE-NEXT: xorl %edx, %edx +; X86-SSE-NEXT: xorl %ecx, %ecx +; X86-SSE-NEXT: xorl %ebx, %ebx +; X86-SSE-NEXT: lock cmpxchg8b (%esi) +; X86-SSE-NEXT: movd %edx, %xmm0 +; X86-SSE-NEXT: movd %eax, %xmm1 +; X86-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; X86-SSE-NEXT: movq %xmm1, (%esp) +; X86-SSE-NEXT: fldl (%esp) +; X86-SSE-NEXT: addl $12, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 12 +; X86-SSE-NEXT: popl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: popl %ebx +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; X86-NOSSE-LABEL: load_double: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl %ebx +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: pushl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12 +; X86-NOSSE-NEXT: subl $12, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 24 +; X86-NOSSE-NEXT: .cfi_offset %esi, -12 +; X86-NOSSE-NEXT: .cfi_offset %ebx, -8 +; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NOSSE-NEXT: xorl %eax, %eax +; X86-NOSSE-NEXT: xorl %edx, %edx +; X86-NOSSE-NEXT: xorl %ecx, %ecx +; X86-NOSSE-NEXT: xorl %ebx, %ebx +; X86-NOSSE-NEXT: lock cmpxchg8b (%esi) +; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: movl %eax, (%esp) +; X86-NOSSE-NEXT: fldl (%esp) +; X86-NOSSE-NEXT: addl $12, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12 +; X86-NOSSE-NEXT: popl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: popl %ebx +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4 +; X86-NOSSE-NEXT: retl +; +; X64-LABEL: load_double: +; X64: # %bb.0: +; X64-NEXT: movq (%rdi), %xmm0 +; X64-NEXT: retq %v = load atomic double, double* %fptr unordered, align 8 ret double %v } define fp128 @load_fp128(fp128* %fptr) { -; CHECK-LABEL: load_fp128: -; CHECK: # %bb.0: -; CHECK-NEXT: pushq %rax -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: xorl %esi, %esi -; CHECK-NEXT: xorl %edx, %edx -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: xorl %r8d, %r8d -; CHECK-NEXT: callq __sync_val_compare_and_swap_16 -; CHECK-NEXT: popq %rcx -; CHECK-NEXT: .cfi_def_cfa_offset 8 -; CHECK-NEXT: retq +; X86-LABEL: load_fp128: +; X86: # %bb.0: +; X86-NEXT: pushl %edi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: pushl %esi +; X86-NEXT: .cfi_def_cfa_offset 12 +; X86-NEXT: subl $20, %esp +; X86-NEXT: .cfi_def_cfa_offset 32 +; X86-NEXT: .cfi_offset %esi, -12 +; X86-NEXT: .cfi_offset %edi, -8 +; X86-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NEXT: subl $8, %esp +; X86-NEXT: .cfi_adjust_cfa_offset 8 +; X86-NEXT: leal {{[0-9]+}}(%esp), %eax +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl $0 +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: pushl %eax +; X86-NEXT: .cfi_adjust_cfa_offset 4 +; X86-NEXT: calll __sync_val_compare_and_swap_16 +; X86-NEXT: .cfi_adjust_cfa_offset -4 +; X86-NEXT: addl $44, %esp +; X86-NEXT: .cfi_adjust_cfa_offset -44 +; X86-NEXT: movl (%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %edi +; X86-NEXT: movl %edi, 8(%esi) +; X86-NEXT: movl %edx, 12(%esi) +; X86-NEXT: movl %eax, (%esi) +; X86-NEXT: movl %ecx, 4(%esi) +; X86-NEXT: movl %esi, %eax +; X86-NEXT: addl $20, %esp +; X86-NEXT: .cfi_def_cfa_offset 12 +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: popl %edi +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl $4 +; +; X64-LABEL: load_fp128: +; X64: # %bb.0: +; X64-NEXT: pushq %rax +; X64-NEXT: .cfi_def_cfa_offset 16 +; X64-NEXT: xorl %esi, %esi +; X64-NEXT: xorl %edx, %edx +; X64-NEXT: xorl %ecx, %ecx +; X64-NEXT: xorl %r8d, %r8d +; X64-NEXT: callq __sync_val_compare_and_swap_16 +; X64-NEXT: popq %rcx +; X64-NEXT: .cfi_def_cfa_offset 8 +; X64-NEXT: retq %v = load atomic fp128, fp128* %fptr unordered, align 16 ret fp128 %v } @@ -111,41 +351,154 @@ define fp128 @load_fp128(fp128* %fptr) { ; interesting one from an ordering perspective on x86. define void @store_float_seq_cst(float* %fptr, float %v) { -; CHECK-LABEL: store_float_seq_cst: -; CHECK: # %bb.0: -; CHECK-NEXT: movd %xmm0, %eax -; CHECK-NEXT: xchgl %eax, (%rdi) -; CHECK-NEXT: retq +; X86-LABEL: store_float_seq_cst: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: xchgl %ecx, (%eax) +; X86-NEXT: retl +; +; X64-LABEL: store_float_seq_cst: +; X64: # %bb.0: +; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: xchgl %eax, (%rdi) +; X64-NEXT: retq store atomic float %v, float* %fptr seq_cst, align 4 ret void } define void @store_double_seq_cst(double* %fptr, double %v) { -; CHECK-LABEL: store_double_seq_cst: -; CHECK: # %bb.0: -; CHECK-NEXT: movq %xmm0, %rax -; CHECK-NEXT: xchgq %rax, (%rdi) -; CHECK-NEXT: retq +; X86-LABEL: store_double_seq_cst: +; X86: # %bb.0: +; X86-NEXT: pushl %ebx +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: pushl %esi +; X86-NEXT: .cfi_def_cfa_offset 12 +; X86-NEXT: .cfi_offset %esi, -12 +; X86-NEXT: .cfi_offset %ebx, -8 +; X86-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl (%esi), %eax +; X86-NEXT: movl 4(%esi), %edx +; X86-NEXT: .p2align 4, 0x90 +; X86-NEXT: .LBB9_1: # %atomicrmw.start +; X86-NEXT: # =>This Inner Loop Header: Depth=1 +; X86-NEXT: lock cmpxchg8b (%esi) +; X86-NEXT: jne .LBB9_1 +; X86-NEXT: # %bb.2: # %atomicrmw.end +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: popl %ebx +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl +; +; X64-LABEL: store_double_seq_cst: +; X64: # %bb.0: +; X64-NEXT: movq %xmm0, %rax +; X64-NEXT: xchgq %rax, (%rdi) +; X64-NEXT: retq store atomic double %v, double* %fptr seq_cst, align 8 ret void } define float @load_float_seq_cst(float* %fptr) { -; CHECK-LABEL: load_float_seq_cst: -; CHECK: # %bb.0: -; CHECK-NEXT: movl (%rdi), %eax -; CHECK-NEXT: movd %eax, %xmm0 -; CHECK-NEXT: retq +; X86-SSE-LABEL: load_float_seq_cst: +; X86-SSE: # %bb.0: +; X86-SSE-NEXT: pushl %eax +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: movl (%eax), %eax +; X86-SSE-NEXT: movd %eax, %xmm0 +; X86-SSE-NEXT: movd %xmm0, (%esp) +; X86-SSE-NEXT: flds (%esp) +; X86-SSE-NEXT: popl %eax +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; X86-NOSSE-LABEL: load_float_seq_cst: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl %eax +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NOSSE-NEXT: movl (%eax), %eax +; X86-NOSSE-NEXT: movl %eax, (%esp) +; X86-NOSSE-NEXT: flds (%esp) +; X86-NOSSE-NEXT: popl %eax +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4 +; X86-NOSSE-NEXT: retl +; +; X64-LABEL: load_float_seq_cst: +; X64: # %bb.0: +; X64-NEXT: movl (%rdi), %eax +; X64-NEXT: movd %eax, %xmm0 +; X64-NEXT: retq %v = load atomic float, float* %fptr seq_cst, align 4 ret float %v } define double @load_double_seq_cst(double* %fptr) { -; CHECK-LABEL: load_double_seq_cst: -; CHECK: # %bb.0: -; CHECK-NEXT: movq (%rdi), %rax -; CHECK-NEXT: movq %rax, %xmm0 -; CHECK-NEXT: retq +; X86-SSE-LABEL: load_double_seq_cst: +; X86-SSE: # %bb.0: +; X86-SSE-NEXT: pushl %ebx +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: pushl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 12 +; X86-SSE-NEXT: subl $12, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 24 +; X86-SSE-NEXT: .cfi_offset %esi, -12 +; X86-SSE-NEXT: .cfi_offset %ebx, -8 +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-SSE-NEXT: xorl %eax, %eax +; X86-SSE-NEXT: xorl %edx, %edx +; X86-SSE-NEXT: xorl %ecx, %ecx +; X86-SSE-NEXT: xorl %ebx, %ebx +; X86-SSE-NEXT: lock cmpxchg8b (%esi) +; X86-SSE-NEXT: movd %edx, %xmm0 +; X86-SSE-NEXT: movd %eax, %xmm1 +; X86-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; X86-SSE-NEXT: movq %xmm1, (%esp) +; X86-SSE-NEXT: fldl (%esp) +; X86-SSE-NEXT: addl $12, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 12 +; X86-SSE-NEXT: popl %esi +; X86-SSE-NEXT: .cfi_def_cfa_offset 8 +; X86-SSE-NEXT: popl %ebx +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; X86-NOSSE-LABEL: load_double_seq_cst: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl %ebx +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: pushl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12 +; X86-NOSSE-NEXT: subl $12, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 24 +; X86-NOSSE-NEXT: .cfi_offset %esi, -12 +; X86-NOSSE-NEXT: .cfi_offset %ebx, -8 +; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NOSSE-NEXT: xorl %eax, %eax +; X86-NOSSE-NEXT: xorl %edx, %edx +; X86-NOSSE-NEXT: xorl %ecx, %ecx +; X86-NOSSE-NEXT: xorl %ebx, %ebx +; X86-NOSSE-NEXT: lock cmpxchg8b (%esi) +; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: movl %eax, (%esp) +; X86-NOSSE-NEXT: fldl (%esp) +; X86-NOSSE-NEXT: addl $12, %esp +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12 +; X86-NOSSE-NEXT: popl %esi +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8 +; X86-NOSSE-NEXT: popl %ebx +; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4 +; X86-NOSSE-NEXT: retl +; +; X64-LABEL: load_double_seq_cst: +; X64: # %bb.0: +; X64-NEXT: movq (%rdi), %rax +; X64-NEXT: movq %rax, %xmm0 +; X64-NEXT: retq %v = load atomic double, double* %fptr seq_cst, align 8 ret double %v } |

