diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/pr30284.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/pr37499.ll | 9 |
4 files changed, 13 insertions, 21 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 31589fe586b..5510d9a9dab 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7816,9 +7816,8 @@ SDValue DAGCombiner::visitVSELECT(SDNode *N) { SDValue N2 = N->getOperand(2); SDLoc DL(N); - // fold (vselect C, X, X) -> X - if (N1 == N2) - return N1; + if (SDValue V = DAG.simplifySelect(N0, N1, N2)) + return V; // Canonicalize integer abs. // vselect (setg[te] X, 0), X, -X -> diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 1a73a01cc49..d98c609ab3a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5078,6 +5078,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT, break; } case ISD::SELECT: + case ISD::VSELECT: if (SDValue V = simplifySelect(N1, N2, N3)) return V; break; @@ -6790,11 +6791,18 @@ SDValue SelectionDAG::simplifySelect(SDValue Cond, SDValue T, SDValue F) { if (F.isUndef()) return T; - // fold (select true, T, F) -> T - // fold (select false, T, F) -> F + // select true, T, F --> T + // select false, T, F --> F if (auto *CondC = dyn_cast<ConstantSDNode>(Cond)) return CondC->isNullValue() ? F : T; + // TODO: This should simplify VSELECT with constant condition using something + // like this (but check boolean contents to be complete?): + // if (ISD::isBuildVectorAllOnes(Cond.getNode())) + // return T; + // if (ISD::isBuildVectorAllZeros(Cond.getNode())) + // return F; + // select ?, T, T --> T if (T == F) return T; diff --git a/llvm/test/CodeGen/X86/pr30284.ll b/llvm/test/CodeGen/X86/pr30284.ll index 4e564d72f8c..a9005377213 100644 --- a/llvm/test/CodeGen/X86/pr30284.ll +++ b/llvm/test/CodeGen/X86/pr30284.ll @@ -4,14 +4,6 @@ define void @undef_cond() { ; CHECK-LABEL: undef_cond: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovapd 0, %zmm0 -; CHECK-NEXT: vmovapd 64, %zmm1 -; CHECK-NEXT: vmovapd {{.*#+}} zmm2 = [0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16] -; CHECK-NEXT: vorpd %zmm2, %zmm0, %zmm0 {%k1} -; CHECK-NEXT: vorpd %zmm2, %zmm1, %zmm1 {%k1} -; CHECK-NEXT: vmovapd %zmm1, 64 -; CHECK-NEXT: vmovapd %zmm0, 0 -; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retl %a_load22 = load <16 x i64>, <16 x i64>* null, align 1 %bitop = or <16 x i64> %a_load22, <i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736> diff --git a/llvm/test/CodeGen/X86/pr37499.ll b/llvm/test/CodeGen/X86/pr37499.ll index 1e7306e16ec..3fd2ca6b1d8 100644 --- a/llvm/test/CodeGen/X86/pr37499.ll +++ b/llvm/test/CodeGen/X86/pr37499.ll @@ -4,14 +4,7 @@ define <2 x i64> @undef_tval() { ; CHECK-LABEL: undef_tval: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovdqa {{.*#+}} xmm0 = [1,1,1,1,1,1,1,1] -; CHECK-NEXT: movb $1, %al -; CHECK-NEXT: kmovw %eax, %k1 -; CHECK-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 -; CHECK-NEXT: vmovdqa32 %ymm1, %ymm1 {%k1} {z} -; CHECK-NEXT: vpmovdw %ymm1, %xmm1 -; CHECK-NEXT: vpblendvb %xmm1, %xmm0, %xmm0, %xmm0 -; CHECK-NEXT: vzeroupper +; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [1,1,1,1,1,1,1,1] ; CHECK-NEXT: retq %1 = tail call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> undef, <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, i8 1) #3 %2 = bitcast <8 x i16> %1 to <2 x i64> |
