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-rw-r--r--llvm/test/Transforms/InstCombine/compare-signs.ll18
-rw-r--r--llvm/test/Transforms/InstCombine/icmp.ll12
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/compare-signs.ll b/llvm/test/Transforms/InstCombine/compare-signs.ll
index f8a8b04c8a0..bec0614e92e 100644
--- a/llvm/test/Transforms/InstCombine/compare-signs.ll
+++ b/llvm/test/Transforms/InstCombine/compare-signs.ll
@@ -67,6 +67,24 @@ define i1 @test4a(i32 %a) {
ret i1 %c
}
+; FIXME: Vectors should fold too.
+define <2 x i1> @test4a_vec(<2 x i32> %a) {
+; CHECK-LABEL: @test4a_vec(
+; CHECK-NEXT: [[L:%.*]] = ashr <2 x i32> %a, <i32 31, i32 31>
+; CHECK-NEXT: [[NA:%.*]] = sub <2 x i32> zeroinitializer, %a
+; CHECK-NEXT: [[R:%.*]] = lshr <2 x i32> [[NA]], <i32 31, i32 31>
+; CHECK-NEXT: [[SIGNUM:%.*]] = or <2 x i32> [[L]], [[R]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[SIGNUM]], <i32 1, i32 1>
+; CHECK-NEXT: ret <2 x i1> [[C]]
+;
+ %l = ashr <2 x i32> %a, <i32 31, i32 31>
+ %na = sub <2 x i32> zeroinitializer, %a
+ %r = lshr <2 x i32> %na, <i32 31, i32 31>
+ %signum = or <2 x i32> %l, %r
+ %c = icmp slt <2 x i32> %signum, <i32 1, i32 1>
+ ret <2 x i1> %c
+}
+
define i1 @test4b(i64 %a) {
; CHECK-LABEL: @test4b(
; CHECK-NEXT: [[C:%.*]] = icmp slt i64 %a, 1
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 7fbc23517f3..c4e70dd9874 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -1185,6 +1185,18 @@ define i1 @icmp_mul_nsw_neg1(i32 %x) {
ret i1 %cmp
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @icmp_mul_nsw_neg1_vec(<2 x i32> %x) {
+; CHECK-LABEL: @icmp_mul_nsw_neg1_vec(
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw <2 x i32> %x, <i32 -12, i32 -12>
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[MUL]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %mul = mul nsw <2 x i32> %x, <i32 -12, i32 -12>
+ %cmp = icmp sge <2 x i32> %mul, <i32 1, i32 1>
+ ret <2 x i1> %cmp
+}
+
define i1 @icmp_mul_nsw_0(i32 %x) {
; CHECK-LABEL: @icmp_mul_nsw_0(
; CHECK-NEXT: ret i1 false
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