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-rw-r--r--llvm/lib/Target/Sparc/SparcRegisterInfo.cpp4
-rw-r--r--llvm/test/CodeGen/SPARC/fp128.ll23
2 files changed, 25 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
index 9a3010639f2..beb8e2c1ff2 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -188,7 +188,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
MachineInstr *StMI =
BuildMI(*MI.getParent(), II, dl, TII.get(SP::STDFri))
.addReg(FrameReg).addImm(0).addReg(SrcEvenReg);
- replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg);
+ replaceFI(MF, *StMI, *StMI, dl, 0, Offset, FrameReg);
MI.setDesc(TII.get(SP::STDFri));
MI.getOperand(2).setReg(SrcOddReg);
Offset += 8;
@@ -200,7 +200,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
MachineInstr *StMI =
BuildMI(*MI.getParent(), II, dl, TII.get(SP::LDDFri), DestEvenReg)
.addReg(FrameReg).addImm(0);
- replaceFI(MF, II, *StMI, dl, 1, Offset, FrameReg);
+ replaceFI(MF, *StMI, *StMI, dl, 1, Offset, FrameReg);
MI.setDesc(TII.get(SP::LDDFri));
MI.getOperand(0).setReg(DestOddReg);
diff --git a/llvm/test/CodeGen/SPARC/fp128.ll b/llvm/test/CodeGen/SPARC/fp128.ll
index b267e8b94ed..83912e0f211 100644
--- a/llvm/test/CodeGen/SPARC/fp128.ll
+++ b/llvm/test/CodeGen/SPARC/fp128.ll
@@ -53,6 +53,29 @@ entry:
ret void
}
+; CHECK-LABEL: f128_spill_large:
+; CHECK: sethi 4, %g1
+; CHECK: sethi 4, %g1
+; CHECK-NEXT: add %g1, %sp, %g1
+; CHECK-NEXT: std %f{{.+}}, [%g1]
+; CHECK: sethi 4, %g1
+; CHECK-NEXT: add %g1, %sp, %g1
+; CHECK-NEXT: std %f{{.+}}, [%g1+8]
+; CHECK: sethi 4, %g1
+; CHECK-NEXT: add %g1, %sp, %g1
+; CHECK-NEXT: ldd [%g1], %f{{.+}}
+; CHECK: sethi 4, %g1
+; CHECK-NEXT: add %g1, %sp, %g1
+; CHECK-NEXT: ldd [%g1+8], %f{{.+}}
+
+define void @f128_spill_large(<251 x fp128>* noalias sret %scalar.result, <251 x fp128>* byval %a) {
+entry:
+ %0 = load <251 x fp128>, <251 x fp128>* %a, align 8
+ call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
+ store <251 x fp128> %0, <251 x fp128>* %scalar.result, align 8
+ ret void
+}
+
; CHECK-LABEL: f128_compare:
; HARD: fcmpq
; HARD-NEXT: nop
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