diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-fixup-apply.s | 26 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-fixups.s | 20 |
4 files changed, 47 insertions, 7 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp index b1ac4a6f277..9ec5f0e0b54 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp @@ -39,10 +39,8 @@ static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { return Value & 0x3fffffc; #if 0 case PPC::fixup_ppc_hi16: - return (Value >> 16) & 0xffff; #endif case PPC::fixup_ppc_ha16: - return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff; case PPC::fixup_ppc_lo16: return Value & 0xffff; case PPC::fixup_ppc_lo16_ds: diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp index 2508cc2f37a..5193dca2882 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp @@ -82,6 +82,7 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target, Type = ELF::R_PPC_ADDR14; // XXX: or BRNTAKEN?_ break; case PPC::fixup_ppc_ha16: + case PPC::fixup_ppc_lo16: switch (Modifier) { default: llvm_unreachable("Unsupported Modifier"); case MCSymbolRefExpr::VK_PPC_TPREL16_HA: @@ -106,11 +107,6 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target, case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_HA: Type = ELF::R_PPC64_GOT_TLSLD16_HA; break; - } - break; - case PPC::fixup_ppc_lo16: - switch (Modifier) { - default: llvm_unreachable("Unsupported Modifier"); case MCSymbolRefExpr::VK_PPC_TPREL16_LO: Type = ELF::R_PPC_TPREL16_LO; break; diff --git a/llvm/test/MC/PowerPC/ppc64-fixup-apply.s b/llvm/test/MC/PowerPC/ppc64-fixup-apply.s index a64052bc46b..fb75703b1c4 100644 --- a/llvm/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/llvm/test/MC/PowerPC/ppc64-fixup-apply.s @@ -5,6 +5,13 @@ # This checks that fixups that can be resolved within the same # object file are applied correctly. +.text + +addi 1, 1, target +addis 1, 1, target + +.set target, 0x1234 + .data .quad v1 @@ -17,6 +24,25 @@ .set v3, 0xbeef .set v4, 0x42 +# CHECK: Section { +# CHECK: Name: .text +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ +# CHECK-NEXT: SHF_ALLOC +# CHECK-NEXT: SHF_EXECINSTR +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: +# CHECK-NEXT: Size: 8 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 4 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 38211234 3C211234 +# CHECK-NEXT: ) +# CHECK-NEXT: } + # CHECK: Section { # CHECK: Name: .data # CHECK-NEXT: Type: SHT_PROGBITS diff --git a/llvm/test/MC/PowerPC/ppc64-fixups.s b/llvm/test/MC/PowerPC/ppc64-fixups.s index 06b2ffd303c..25c1736f101 100644 --- a/llvm/test/MC/PowerPC/ppc64-fixups.s +++ b/llvm/test/MC/PowerPC/ppc64-fixups.s @@ -27,6 +27,26 @@ # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 addi 4, 3, target@l +# CHECK: li 3, target@ha # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 + li 3, target@ha + +# CHECK: lis 3, target@l # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 + lis 3, target@l + +# CHECK: li 3, target # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0 + li 3, target + +# CHECK: lis 3, target # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0 + lis 3, target + # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_lo16 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 |
