diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/IR/Instructions.cpp | 22 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/bitcast-bitcast.ll | 18 |
2 files changed, 18 insertions, 22 deletions
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp index 839908268c9..11c55865135 100644 --- a/llvm/lib/IR/Instructions.cpp +++ b/llvm/lib/IR/Instructions.cpp @@ -2516,17 +2516,19 @@ unsigned CastInst::isEliminableCastPair( { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,13,12}, // AddrSpaceCast -+ }; + // TODO: This logic could be encoded into the table above and handled in the + // switch below. // If either of the casts are a bitcast from scalar to vector, disallow the - // merging. However, bitcast of A->B->A are allowed. - bool isFirstBitcast = (firstOp == Instruction::BitCast); - bool isSecondBitcast = (secondOp == Instruction::BitCast); - bool chainedBitcast = (SrcTy == DstTy && isFirstBitcast && isSecondBitcast); - - // Check if any of the bitcasts convert scalars<->vectors. - if ((isFirstBitcast && isa<VectorType>(SrcTy) != isa<VectorType>(MidTy)) || - (isSecondBitcast && isa<VectorType>(MidTy) != isa<VectorType>(DstTy))) - // Unless we are bitcasting to the original type, disallow optimizations. - if (!chainedBitcast) return 0; + // merging. However, any pair of bitcasts are allowed. + bool IsFirstBitcast = (firstOp == Instruction::BitCast); + bool IsSecondBitcast = (secondOp == Instruction::BitCast); + bool AreBothBitcasts = IsFirstBitcast && IsSecondBitcast; + + // Check if any of the casts convert scalars <-> vectors. + if ((IsFirstBitcast && isa<VectorType>(SrcTy) != isa<VectorType>(MidTy)) || + (IsSecondBitcast && isa<VectorType>(MidTy) != isa<VectorType>(DstTy))) + if (!AreBothBitcasts) + return 0; int ElimCase = CastResults[firstOp-Instruction::CastOpsBegin] [secondOp-Instruction::CastOpsBegin]; diff --git a/llvm/test/Transforms/InstCombine/bitcast-bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast-bitcast.ll index a67666c60a5..0f46ff53bc1 100644 --- a/llvm/test/Transforms/InstCombine/bitcast-bitcast.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-bitcast.ll @@ -18,8 +18,7 @@ define <2 x i32> @bitcast_bitcast_s_s_v(i64 %a) { ret <2 x i32> %bc2 ; CHECK-LABEL: @bitcast_bitcast_s_s_v( -; CHECK-NEXT: %bc1 = bitcast i64 %a to double -; CHECK-NEXT: %bc2 = bitcast double %bc1 to <2 x i32> +; CHECK-NEXT: %bc2 = bitcast i64 %a to <2 x i32> ; CHECK-NEXT: ret <2 x i32> %bc2 } @@ -29,8 +28,7 @@ define double @bitcast_bitcast_s_v_s(i64 %a) { ret double %bc2 ; CHECK-LABEL: @bitcast_bitcast_s_v_s( -; CHECK-NEXT: %bc1 = bitcast i64 %a to <2 x i32> -; CHECK-NEXT: %bc2 = bitcast <2 x i32> %bc1 to double +; CHECK-NEXT: %bc2 = bitcast i64 %a to double ; CHECK-NEXT: ret double %bc2 } @@ -40,8 +38,7 @@ define <2 x i32> @bitcast_bitcast_s_v_v(i64 %a) { ret <2 x i32> %bc2 ; CHECK-LABEL: @bitcast_bitcast_s_v_v( -; CHECK-NEXT: %bc1 = bitcast i64 %a to <4 x i16> -; CHECK-NEXT: %bc2 = bitcast <4 x i16> %bc1 to <2 x i32> +; CHECK-NEXT: %bc2 = bitcast i64 %a to <2 x i32> ; CHECK-NEXT: ret <2 x i32> %bc2 } @@ -51,8 +48,7 @@ define i64 @bitcast_bitcast_v_s_s(<2 x i32> %a) { ret i64 %bc2 ; CHECK-LABEL: @bitcast_bitcast_v_s_s( -; CHECK-NEXT: %bc1 = bitcast <2 x i32> %a to double -; CHECK-NEXT: %bc2 = bitcast double %bc1 to i64 +; CHECK-NEXT: %bc2 = bitcast <2 x i32> %a to i64 ; CHECK-NEXT: ret i64 %bc2 } @@ -62,8 +58,7 @@ define <4 x i16> @bitcast_bitcast_v_s_v(<2 x i32> %a) { ret <4 x i16> %bc2 ; CHECK-LABEL: @bitcast_bitcast_v_s_v( -; CHECK-NEXT: %bc1 = bitcast <2 x i32> %a to double -; CHECK-NEXT: %bc2 = bitcast double %bc1 to <4 x i16> +; CHECK-NEXT: %bc2 = bitcast <2 x i32> %a to <4 x i16> ; CHECK-NEXT: ret <4 x i16> %bc2 } @@ -73,8 +68,7 @@ define double @bitcast_bitcast_v_v_s(<2 x float> %a) { ret double %bc2 ; CHECK-LABEL: @bitcast_bitcast_v_v_s( -; CHECK-NEXT: %bc1 = bitcast <2 x float> %a to <4 x i16> -; CHECK-NEXT: %bc2 = bitcast <4 x i16> %bc1 to double +; CHECK-NEXT: %bc2 = bitcast <2 x float> %a to double ; CHECK-NEXT: ret double %bc2 } |
