summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td15
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir21
2 files changed, 35 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 46bdeba6bbd..13abdc9687e 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -722,7 +722,20 @@ def arm_i32imm : PatLeaf<(imm), [{
if (Subtarget->useMovt(*MF))
return true;
return ARM_AM::isSOImmTwoPartVal((unsigned)N->getZExtValue());
-}]>;
+}]> {
+ // Ideally this would be an IntImmLeaf, but then we wouldn't have access to
+ // the MachineFunction.
+ let GISelPredicateCode = [{
+ const auto &MF = *MI.getParent()->getParent();
+ if (STI.useMovt(MF))
+ return true;
+
+ const auto &MO = MI.getOperand(1);
+ if (!MO.isCImm())
+ return false;
+ return ARM_AM::isSOImmTwoPartVal(MO.getCImm()->getZExtValue());
+ }];
+}
/// imm0_1 predicate - Immediate in the range [0,1].
def Imm0_1AsmOperand: ImmAsmOperand<0,1> { let Name = "Imm0_1"; }
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
index 4b9812c50d1..f030a5aa01d 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
@@ -64,8 +64,12 @@
define void @test_stores() #0 { ret void }
define void @test_gep() { ret void }
+
+ define void @test_MOVi32imm() #3 { ret void }
+
define void @test_constant_imm() { ret void }
define void @test_constant_cimm() { ret void }
+
define void @test_pointer_constant_unconstrained() { ret void }
define void @test_pointer_constant_constrained() { ret void }
@@ -1481,6 +1485,23 @@ body: |
BX_RET 14, $noreg, implicit $r0
...
---
+name: test_MOVi32imm
+# CHECK-LABEL: name: test_MOVi32imm
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+body: |
+ bb.0:
+ %0(s32) = G_CONSTANT 65537
+ ; CHECK: %[[C:[0-9]+]]:gpr = MOVi32imm 65537
+
+ $r0 = COPY %0(s32)
+ BX_RET 14, $noreg, implicit $r0
+...
+---
name: test_constant_imm
# CHECK-LABEL: name: test_constant_imm
legalized: true
OpenPOWER on IntegriCloud