summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h11
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h9
-rw-r--r--llvm/utils/TableGen/X86DisassemblerShared.h23
3 files changed, 20 insertions, 23 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
index 19455e33ed9..67f52e55fac 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
@@ -16,9 +16,6 @@
#ifndef X86DISASSEMBLERDECODER_H
#define X86DISASSEMBLERDECODER_H
-#define INSTRUCTION_SPECIFIER_FIELDS \
- uint16_t operands;
-
#define INSTRUCTION_IDS \
uint16_t instructionIDs;
@@ -532,6 +529,14 @@ typedef int (*byteReader_t)(const void* arg, uint8_t* byte, uint64_t address);
typedef void (*dlog_t)(void* arg, const char *log);
/*
+ * The specification for how to extract and interpret a full instruction and
+ * its operands.
+ */
+struct InstructionSpecifier {
+ uint16_t operands;
+};
+
+/*
* The x86 internal instruction, which is produced by the decoder.
*/
struct InternalInstruction {
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
index b8130a0f9c7..d323fa2cc72 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
@@ -539,15 +539,6 @@ enum ModifierType {
#define X86_MAX_OPERANDS 5
/*
- * The specification for how to extract and interpret a full instruction and
- * its operands.
- */
-struct InstructionSpecifier {
- /* The macro below must be defined wherever this file is included. */
- INSTRUCTION_SPECIFIER_FIELDS
-};
-
-/*
* Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
* are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
* respectively.
diff --git a/llvm/utils/TableGen/X86DisassemblerShared.h b/llvm/utils/TableGen/X86DisassemblerShared.h
index 036e92430b0..2d3d3fc1bcb 100644
--- a/llvm/utils/TableGen/X86DisassemblerShared.h
+++ b/llvm/utils/TableGen/X86DisassemblerShared.h
@@ -13,17 +13,6 @@
#include <string.h>
#include <string>
-#define INSTRUCTION_SPECIFIER_FIELDS \
- struct OperandSpecifier operands[X86_MAX_OPERANDS]; \
- InstructionContext insnContext; \
- std::string name; \
- \
- InstructionSpecifier() { \
- insnContext = IC; \
- name = ""; \
- memset(operands, 0, sizeof(operands)); \
- }
-
#define INSTRUCTION_IDS \
InstrUID instructionIDs[256];
@@ -32,4 +21,16 @@
#undef INSTRUCTION_SPECIFIER_FIELDS
#undef INSTRUCTION_IDS
+struct InstructionSpecifier {
+ llvm::X86Disassembler::OperandSpecifier operands[X86_MAX_OPERANDS];
+ llvm::X86Disassembler::InstructionContext insnContext;
+ std::string name;
+
+ InstructionSpecifier() {
+ insnContext = llvm::X86Disassembler::IC;
+ name = "";
+ memset(operands, 0, sizeof(operands));
+ }
+};
+
#endif
OpenPOWER on IntegriCloud