diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll | 12 |
2 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 7df13834055..680b497fb15 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3245,6 +3245,18 @@ static bool isFloatingPointZero(SDValue Op) { if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal())) return CFP->getValueAPF().isPosZero(); } + } else if (Op->getOpcode() == ISD::BITCAST && + Op->getValueType(0) == MVT::f64) { + // Handle (ISD::BITCAST (ARMISD::VMOVIMM (ISD::TargetConstant 0)) MVT::f64) + // created by LowerConstantFP(). + SDValue BitcastOp = Op->getOperand(0); + if (BitcastOp->getOpcode() == ARMISD::VMOVIMM) { + SDValue MoveOp = BitcastOp->getOperand(0); + if (MoveOp->getOpcode() == ISD::TargetConstant && + cast<ConstantSDNode>(MoveOp)->getZExtValue() == 0) { + return true; + } + } } return false; } diff --git a/llvm/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll b/llvm/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll new file mode 100644 index 00000000000..7444a6851d9 --- /dev/null +++ b/llvm/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll @@ -0,0 +1,12 @@ +; RUN: llc -mtriple=linux-arm-gnueabihf -mattr=+neon %s -o - | FileCheck %s + +; Check that no intermediate integer register is used. +define i32 @no-intermediate-register-for-zero-imm(double %x) #0 { +entry: +; CHECK-LABEL: no-intermediate-register-for-zero-imm +; CHECK-NOT: vmov +; CHECK: vcmp + %cmp = fcmp une double %x, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} |
