diff options
Diffstat (limited to 'llvm')
4 files changed, 32 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index e76c40f8d93..80da50562d3 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -11,6 +11,7 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/GlobalISel/IRTranslator.h" +#include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/ScopeExit.h" #include "llvm/ADT/SmallSet.h" @@ -33,6 +34,7 @@ #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/BasicBlock.h" +#include "llvm/IR/CFG.h" #include "llvm/IR/Constant.h" #include "llvm/IR/Constants.h" #include "llvm/IR/DataLayout.h" @@ -1613,19 +1615,20 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) { ArgIt++; } - // And translate the function! - for (const BasicBlock &BB : F) { - MachineBasicBlock &MBB = getMBB(BB); + // Need to visit defs before uses when translating instructions. + ReversePostOrderTraversal<const Function *> RPOT(&F); + for (const BasicBlock *BB : RPOT) { + MachineBasicBlock &MBB = getMBB(*BB); // Set the insertion point of all the following translations to // the end of this basic block. CurBuilder.setMBB(MBB); - for (const Instruction &Inst : BB) { + for (const Instruction &Inst : *BB) { if (translate(Inst)) continue; OptimizationRemarkMissed R("gisel-irtranslator", "GISelFailure", - Inst.getDebugLoc(), &BB); + Inst.getDebugLoc(), BB); R << "unable to translate instruction: " << ore::NV("Opcode", &Inst); if (ORE->allowExtraAnalysis("gisel-irtranslator")) { diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll index 9c9d22d8ff6..c0a1a2a149d 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll @@ -141,7 +141,7 @@ define fp128 @test_quad_dump() { ret fp128 0xL00000000000000004000000000000000 } -; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %0:_(p0) = G_EXTRACT_VECTOR_ELT %1:_(<2 x p0>), %2:_(s32) (in function: vector_of_pointers_extractelement) +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %2:_(p0) = G_EXTRACT_VECTOR_ELT %0:_(<2 x p0>), %3:_(s32) (in function: vector_of_pointers_extractelement) ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for vector_of_pointers_extractelement ; FALLBACK-WITH-REPORT-OUT-LABEL: vector_of_pointers_extractelement: @var = global <2 x i16*> zeroinitializer @@ -158,7 +158,7 @@ end: br label %block } -; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0:_(<2 x p0>), %5:_(p0) :: (store 16 into `<2 x i16*>* undef`) (in function: vector_of_pointers_insertelement) +; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %2:_(<2 x p0>), %1:_(p0) :: (store 16 into `<2 x i16*>* undef`) (in function: vector_of_pointers_insertelement) ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for vector_of_pointers_insertelement ; FALLBACK-WITH-REPORT-OUT-LABEL: vector_of_pointers_insertelement: define void @vector_of_pointers_insertelement() { diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 89c1f0dc84b..2c8ee439d24 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -138,9 +138,9 @@ false: ; CHECK: %0:_(s32) = COPY $w0 ; CHECK: %[[reg100:[0-9]+]]:_(s32) = G_CONSTANT i32 100 ; CHECK: %[[reg200:[0-9]+]]:_(s32) = G_CONSTANT i32 200 -; CHECK: %[[reg0:[0-9]+]]:_(s32) = G_CONSTANT i32 0 -; CHECK: %[[reg1:[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK: %[[reg2:[0-9]+]]:_(s32) = G_CONSTANT i32 2 +; CHECK: %[[reg1:[0-9]+]]:_(s32) = G_CONSTANT i32 1 +; CHECK: %[[reg0:[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK: %[[regicmp100:[0-9]+]]:_(s1) = G_ICMP intpred(eq), %[[reg100]](s32), %0 ; CHECK: G_BRCOND %[[regicmp100]](s1), %[[BB_CASE100]] ; CHECK: G_BR %[[BB_NOTCASE100_CHECKNEXT]] @@ -413,9 +413,9 @@ define i64* @trivial_bitcast(i8* %a) { ; CHECK: G_BR %[[CAST:bb\.[0-9]+]] ; CHECK: [[END:bb\.[0-9]+]].{{[a-zA-Z0-9.]+}}: +; CHECK: $x0 = COPY [[A]] ; CHECK: [[CAST]].{{[a-zA-Z0-9.]+}}: -; CHECK: {{%[0-9]+}}:_(p0) = COPY [[A]] ; CHECK: G_BR %[[END]] define i64* @trivial_bitcast_with_copy(i8* %a) { br label %cast diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-block-order.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-block-order.ll new file mode 100644 index 00000000000..89e2fecbe0f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-block-order.ll @@ -0,0 +1,19 @@ +; RUN: llc -O0 -o - %s | FileCheck %s +target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" +target triple = "aarch64-unknown-linux-gnu" + +; CHECK-LABEL: testfn +; CHECK: ret +define void @testfn() { +start: + br label %bb2 + +bb1: + store i8 %0, i8* undef, align 4 + ret void + +bb2: + %0 = extractvalue { i32, i8 } undef, 1 + br label %bb1 +} + |
