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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp2
-rw-r--r--llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll4
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 73b86632bc4..0eb8d35cafa 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3525,7 +3525,7 @@ SDValue DAGCombiner::foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
// operations on the left and right operands, so those types must match.
EVT VT = N0.getValueType();
EVT OpVT = LL.getValueType();
- if (LegalOperations || VT != MVT::i1)
+ if (LegalOperations || VT.getScalarType() != MVT::i1)
if (VT != getSetCCResultType(OpVT))
return SDValue();
if (OpVT != RL.getValueType())
diff --git a/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll b/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
index e75e6ea0ad5..dd9ed2c0a60 100644
--- a/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
@@ -1132,10 +1132,8 @@ define <8 x i32> @testnm_and(<8 x i32> %a, <8 x i32> %b, <8 x i32> %x, <8 x i32>
; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: def %ymm3 killed %ymm3 def %zmm3
; NoVLX-NEXT: # kill: def %ymm2 killed %ymm2 def %zmm2
-; NoVLX-NEXT: # kill: def %ymm1 killed %ymm1 def %zmm1
-; NoVLX-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+; NoVLX-NEXT: vpor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vptestnmd %zmm0, %zmm0, %k1
-; NoVLX-NEXT: vptestnmd %zmm1, %zmm1, %k1 {%k1}
; NoVLX-NEXT: vpblendmd %zmm2, %zmm3, %zmm0 {%k1}
; NoVLX-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0
; NoVLX-NEXT: retq
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