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-rw-r--r--llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp15
-rw-r--r--llvm/lib/Target/Mips/MipsLegalizerInfo.cpp4
-rw-r--r--llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir30
-rw-r--r--llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/trunc.ll13
4 files changed, 62 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 26c25ba26d4..4622248102e 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -633,6 +633,21 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
MI.eraseFromParent();
return Legalized;
}
+ case TargetOpcode::G_TRUNC: {
+ if (TypeIdx != 1)
+ return UnableToLegalize;
+
+ uint64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
+ if (NarrowTy.getSizeInBits() * 2 != SizeOp1) {
+ LLVM_DEBUG(dbgs() << "Can't narrow trunc to type " << NarrowTy << "\n");
+ return UnableToLegalize;
+ }
+
+ auto Unmerge = MIRBuilder.buildUnmerge(NarrowTy, MI.getOperand(1).getReg());
+ MIRBuilder.buildCopy(MI.getOperand(0).getReg(), Unmerge.getReg(0));
+ MI.eraseFromParent();
+ return Legalized;
+ }
case TargetOpcode::G_ADD: {
// FIXME: add support for when SizeOp0 isn't an exact multiple of
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
index 558af42cf7e..456411682ca 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -54,6 +54,10 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
{s32, p0, 16, 8}})
.minScalar(0, s32);
+ getActionDefinitionsBuilder(G_TRUNC)
+ .legalIf([](const LegalityQuery &Query) { return false; })
+ .maxScalar(1, s32);
+
getActionDefinitionsBuilder(G_SELECT)
.legalForCartesianProduct({p0, s32, s64}, {s32})
.minScalar(0, s32)
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
new file mode 100644
index 00000000000..fb45cc3ea46
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
@@ -0,0 +1,30 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+ define void @trunc() {entry: ret void}
+
+...
+---
+name: trunc
+alignment: 2
+tracksRegLiveness: true
+body: |
+ bb.1.entry:
+ liveins: $a0, $a1
+
+ ; MIPS32-LABEL: name: trunc
+ ; MIPS32: liveins: $a0, $a1
+ ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; MIPS32: $v0 = COPY [[COPY2]](s32)
+ ; MIPS32: RetRA implicit $v0
+ %1:_(s32) = COPY $a0
+ %2:_(s32) = COPY $a1
+ %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
+ %3:_(s32) = G_TRUNC %0(s64)
+ $v0 = COPY %3(s32)
+ RetRA implicit $v0
+
+...
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/trunc.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/trunc.ll
new file mode 100644
index 00000000000..7ea5ad8c31b
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/trunc.ll
@@ -0,0 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+
+define i32 @trunc(i64 %x) {
+; MIPS32-LABEL: trunc:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: move $2, $4
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %conv = trunc i64 %x to i32
+ ret i32 %conv
+}
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