diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 23 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips16/invalid.s | 10 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips16/valid.s | 3 |
5 files changed, 32 insertions, 12 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index bcead81415e..35072608dec 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -1278,8 +1278,8 @@ let Predicates = [InMicroMips] in { II_DIVU, 0, 1, 1>, ISA_MIPS1_NOT_32R6_64R6; def : MipsInstAlias<"wait", (WAIT_MM 0x0), 1>, ISA_MICROMIPS; - def : MipsInstAlias<"nop", (SLL_MM ZERO, ZERO, 0), 1>; - def : MipsInstAlias<"nop", (MOVE16_MM ZERO, ZERO), 1>; + def : MipsInstAlias<"nop", (SLL_MM ZERO, ZERO, 0), 1>, ISA_MICROMIPS; + def : MipsInstAlias<"nop", (MOVE16_MM ZERO, ZERO), 1>, ISA_MICROMIPS; def : MipsInstAlias<"ei", (EI_MM ZERO), 1>, ISA_MICROMIPS; def : MipsInstAlias<"di", (DI_MM ZERO), 1>, ISA_MICROMIPS; def : MipsInstAlias<"neg $rt, $rs", diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.td b/llvm/lib/Target/Mips/Mips16InstrInfo.td index 0d3c9a4556a..1a4ce5ee5f1 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.td @@ -1914,3 +1914,7 @@ def CONSTPOOL_ENTRY : MipsPseudo16<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx, i32imm:$size), "foo", []>; +// Instruction Aliases + +let EncodingPredicates = [InMips16Mode] in +def : MipsInstAlias<"nop", (Move32R16 ZERO, S0)>; diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 5629cb5115d..547fdb6efd2 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -2308,17 +2308,19 @@ let AdditionalPredicates = [NotInMicroMips] in { /// Word Swap Bytes Within Halfwords def WSBH : MMRel, SubwordSwap<"wsbh", GPR32Opnd, II_WSBH>, SEB_FM<2, 0x20>, ISA_MIPS32R2; -} -/// No operation. -def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>; + /// No operation. + def NOP : PseudoSE<(outs), (ins), []>, + PseudoInstExpansion<(SLL ZERO, ZERO, 0)>, ISA_MIPS1; -// FrameIndexes are legalized when they are operands from load/store -// instructions. The same not happens for stack address copies, so an -// add op with mem ComplexPattern is used and the stack address copy -// can be matched. It's similar to Sparc LEA_ADDRi -let AdditionalPredicates = [NotInMicroMips] in - def LEA_ADDiu : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>, ISA_MIPS1; + // FrameIndexes are legalized when they are operands from load/store + // instructions. The same not happens for stack address copies, so an + // add op with mem ComplexPattern is used and the stack address copy + // can be matched. It's similar to Sparc LEA_ADDRi + let AdditionalPredicates = [NotInMicroMips] in + def LEA_ADDiu : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>, ISA_MIPS1; + +} // MADD*/MSUB* def MADD : MMRel, MArithR<"madd", II_MADD, 1>, MULT_FM<0x1c, 0>, @@ -2636,7 +2638,8 @@ let AdditionalPredicates = [NotInMicroMips] in { def : MipsInstAlias< "not $rt", (NOR GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>; - def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>; + + def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>, ISA_MIPS1; defm : OneOrTwoOperandMacroImmediateAlias<"add", ADDi>, ISA_MIPS1_NOT_32R6_64R6; diff --git a/llvm/test/MC/Mips/mips16/invalid.s b/llvm/test/MC/Mips/mips16/invalid.s new file mode 100644 index 00000000000..4ed3c914333 --- /dev/null +++ b/llvm/test/MC/Mips/mips16/invalid.s @@ -0,0 +1,10 @@ +# RUN: not llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mips16 < %s 2> %t +# RUN: FileCheck %s < %t + +# Instructions which are invalid. + +$label: + nop 4 # CHECK: :[[@LINE]]:7: error: invalid operand for instruction + nop $4 # CHECK: :[[@LINE]]:7: error: invalid operand for instruction + nop $label # CHECK: :[[@LINE]]:7: error: invalid operand for instruction + diff --git a/llvm/test/MC/Mips/mips16/valid.s b/llvm/test/MC/Mips/mips16/valid.s new file mode 100644 index 00000000000..887ff19c908 --- /dev/null +++ b/llvm/test/MC/Mips/mips16/valid.s @@ -0,0 +1,3 @@ +# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mips16 -show-encoding -show-inst < %s + + nop |
