diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTX.td | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXSubtarget.h | 4 | ||||
| -rw-r--r-- | llvm/test/DebugInfo/NVPTX/debug-info.ll | 2 |
3 files changed, 5 insertions, 12 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTX.td b/llvm/lib/Target/NVPTX/NVPTX.td index aba37d36359..0cafb0ffdba 100644 --- a/llvm/lib/Target/NVPTX/NVPTX.td +++ b/llvm/lib/Target/NVPTX/NVPTX.td @@ -53,9 +53,6 @@ def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62", def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70", "Target SM 7.0">; -def SATOM : SubtargetFeature<"satom", "HasAtomScope", "true", - "Atomic operations with scope">; - // PTX Versions def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32", "Use PTX version 3.2">; @@ -88,10 +85,10 @@ def : Proc<"sm_37", [SM37, PTX41]>; def : Proc<"sm_50", [SM50, PTX40]>; def : Proc<"sm_52", [SM52, PTX41]>; def : Proc<"sm_53", [SM53, PTX42]>; -def : Proc<"sm_60", [SM60, PTX50, SATOM]>; -def : Proc<"sm_61", [SM61, PTX50, SATOM]>; -def : Proc<"sm_62", [SM62, PTX50, SATOM]>; -def : Proc<"sm_70", [SM70, PTX60, SATOM]>; +def : Proc<"sm_60", [SM60, PTX50]>; +def : Proc<"sm_61", [SM61, PTX50]>; +def : Proc<"sm_62", [SM62, PTX50]>; +def : Proc<"sm_70", [SM70, PTX60]>; def NVPTXInstrInfo : InstrInfo { } diff --git a/llvm/lib/Target/NVPTX/NVPTXSubtarget.h b/llvm/lib/Target/NVPTX/NVPTXSubtarget.h index aa57e3e51ed..fa35673bbbb 100644 --- a/llvm/lib/Target/NVPTX/NVPTXSubtarget.h +++ b/llvm/lib/Target/NVPTX/NVPTXSubtarget.h @@ -48,10 +48,6 @@ class NVPTXSubtarget : public NVPTXGenSubtargetInfo { // FrameLowering class because TargetFrameLowering is abstract. NVPTXFrameLowering FrameLowering; -protected: - // Processor supports scoped atomic operations. - bool HasAtomScope; - public: /// This constructor initializes the data members to match that /// of the specified module. diff --git a/llvm/test/DebugInfo/NVPTX/debug-info.ll b/llvm/test/DebugInfo/NVPTX/debug-info.ll index 2b10f7f521d..ef8e843e501 100644 --- a/llvm/test/DebugInfo/NVPTX/debug-info.ll +++ b/llvm/test/DebugInfo/NVPTX/debug-info.ll @@ -111,7 +111,7 @@ declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1 ; Function Attrs: nounwind readnone speculatable declare void @llvm.dbg.value(metadata, metadata, metadata) #2 -attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="sm_20" "target-features"="+ptx42,-satom" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="sm_20" "target-features"="+ptx42" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } attributes #2 = { nounwind readnone speculatable } attributes #3 = { nounwind } |
