diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/include/llvm/Target/TargetSchedule.td | 8 | ||||
| -rw-r--r-- | llvm/lib/MCA/HardwareUnits/LSUnit.cpp | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/llvm/include/llvm/Target/TargetSchedule.td b/llvm/include/llvm/Target/TargetSchedule.td index a36d259df83..24f37e94da9 100644 --- a/llvm/include/llvm/Target/TargetSchedule.td +++ b/llvm/include/llvm/Target/TargetSchedule.td @@ -563,10 +563,10 @@ class RetireControlUnit<int bufferSize, int retirePerCycle> { // Base class for Load/StoreQueue. It is used to identify processor resources // which describe load/store queues in the LS unit. -class MemoryQueue<ProcResource PR> { - ProcResource QueueDescriptor = PR; +class MemoryQueue<ProcResourceKind PR> { + ProcResourceKind QueueDescriptor = PR; SchedMachineModel SchedModel = ?; } -class LoadQueue<ProcResource LDQueue> : MemoryQueue<LDQueue>; -class StoreQueue<ProcResource STQueue> : MemoryQueue<STQueue>; +class LoadQueue<ProcResourceKind LDQueue> : MemoryQueue<LDQueue>; +class StoreQueue<ProcResourceKind STQueue> : MemoryQueue<STQueue>; diff --git a/llvm/lib/MCA/HardwareUnits/LSUnit.cpp b/llvm/lib/MCA/HardwareUnits/LSUnit.cpp index ac1a6a36547..0465f53ed36 100644 --- a/llvm/lib/MCA/HardwareUnits/LSUnit.cpp +++ b/llvm/lib/MCA/HardwareUnits/LSUnit.cpp @@ -29,12 +29,12 @@ LSUnitBase::LSUnitBase(const MCSchedModel &SM, unsigned LQ, unsigned SQ, const MCExtraProcessorInfo &EPI = SM.getExtraProcessorInfo(); if (!LQSize && EPI.LoadQueueID) { const MCProcResourceDesc &LdQDesc = *SM.getProcResource(EPI.LoadQueueID); - LQSize = LdQDesc.BufferSize; + LQSize = std::max(0, LdQDesc.BufferSize); } if (!SQSize && EPI.StoreQueueID) { const MCProcResourceDesc &StQDesc = *SM.getProcResource(EPI.StoreQueueID); - SQSize = StQDesc.BufferSize; + SQSize = std::max(0, StQDesc.BufferSize); } } } |
