diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 6c204bc0ed5..6e19db3c7e2 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -2566,8 +2566,12 @@ bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) { return SelectCall(&I, "memset"); } case Intrinsic::trap: { - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get( - Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP)); + unsigned Opcode; + if (Subtarget->isThumb()) + Opcode = ARM::tTRAP; + else + Opcode = Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP; + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opcode)); return true; } } diff --git a/llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir b/llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir index 7a4db88479b..4ebc0eeae32 100644 --- a/llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir +++ b/llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir @@ -30,4 +30,4 @@ body: | renamable $r1 = tLDRi renamable $r4, 1, 14, $noreg :: (load 4) bb.2: liveins: $r4 - TRAP + tTRAP |
