diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/Windows/libcalls.ll (renamed from llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll) | 39 |
2 files changed, 43 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index d63cb32bcde..5020de8d592 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -363,6 +363,11 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM, { RTLIB::SINTTOFP_I64_F64, "__i64tod", CallingConv::ARM_AAPCS_VFP }, { RTLIB::UINTTOFP_I64_F32, "__u64tos", CallingConv::ARM_AAPCS_VFP }, { RTLIB::UINTTOFP_I64_F64, "__u64tod", CallingConv::ARM_AAPCS_VFP }, + + { RTLIB::SDIV_I32, "__rt_sdiv", CallingConv::ARM_AAPCS_VFP }, + { RTLIB::UDIV_I32, "__rt_udiv", CallingConv::ARM_AAPCS_VFP }, + { RTLIB::SDIV_I64, "__rt_sdiv64", CallingConv::ARM_AAPCS_VFP }, + { RTLIB::UDIV_I64, "__rt_udiv64", CallingConv::ARM_AAPCS_VFP }, }; for (const auto &LC : LibraryCalls) { diff --git a/llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll b/llvm/test/CodeGen/ARM/Windows/libcalls.ll index acf21a1caad..b6d2d8c7954 100644 --- a/llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll +++ b/llvm/test/CodeGen/ARM/Windows/libcalls.ll @@ -1,4 +1,41 @@ -; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s +; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s +; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s + +define arm_aapcs_vfpcc i32 @sdiv32(i32 %divisor, i32 %divident) { +entry: + %div = sdiv i32 %divident, %divisor + ret i32 %div +} + +; CHECK-LABEL: sdiv32 +; CHECK: b __rt_sdiv + +define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) { +entry: + %div = sdiv i64 %divident, %divisor + ret i64 %div +} + +; CHECK-LABEL: sdiv64 +; CHECK: bl __rt_sdiv64 + +define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) { +entry: + %div = udiv i32 %divident, %divisor + ret i32 %div +} + +; CHECK-LABEL: udiv32 +; CHECK: b __rt_udiv + +define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) { +entry: + %div = udiv i64 %divident, %divisor + ret i64 %div +} + +; CHECK-LABEL: udiv64 +; CHECK: bl __rt_udiv64 define arm_aapcs_vfpcc i64 @stoi64(float %f) { entry: |
