diff options
Diffstat (limited to 'llvm')
4 files changed, 60 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll b/llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll index 530cab60bdf..a48198b5746 100644 --- a/llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll +++ b/llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll @@ -102,6 +102,22 @@ define i1 @c0(i8 %bits) { ret i1 %r } +; What if we have the same pattern on both sides? +define i1 @both(i8 %bits0, i8 %bits1) { +; CHECK-LABEL: @both( +; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[BITS0:%.*]] +; CHECK-NEXT: [[T2:%.*]] = shl i8 -1, [[BITS1:%.*]] +; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T2]], [[T0]] +; CHECK-NEXT: ret i1 [[R]] +; + %t0 = shl i8 -1, %bits0 + %t1 = xor i8 %t0, -1 + %t2 = shl i8 -1, %bits1 + %t3 = xor i8 %t2, -1 + %r = icmp uge i8 %t1, %t3 + ret i1 %r +} + ; ============================================================================ ; ; One-use tests. ; ============================================================================ ; diff --git a/llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll b/llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll index 6c447a7098c..07576677f58 100644 --- a/llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll +++ b/llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll @@ -68,6 +68,20 @@ define i1 @c0(i8 %bits) { ret i1 %r } +; What if we have the same pattern on both sides? +define i1 @both(i8 %bits0, i8 %bits1) { +; CHECK-LABEL: @both( +; CHECK-NEXT: [[T1:%.*]] = shl i8 1, [[BITS1:%.*]] +; CHECK-NEXT: [[T1_HIGHBITS:%.*]] = lshr i8 [[T1]], [[BITS0:%.*]] +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[T1_HIGHBITS]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %t0 = shl i8 1, %bits0 + %t1 = shl i8 1, %bits1 + %r = icmp ugt i8 %t0, %t1 + ret i1 %r +} + ; ============================================================================ ; ; One-use tests. ; ============================================================================ ; diff --git a/llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll b/llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll index 4b57c5ba403..b9d03393939 100644 --- a/llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll +++ b/llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll @@ -68,6 +68,20 @@ define i1 @c0(i8 %bits) { ret i1 %r } +; What if we have the same pattern on both sides? +define i1 @both(i8 %bits0, i8 %bits1) { +; CHECK-LABEL: @both( +; CHECK-NEXT: [[T1:%.*]] = shl i8 1, [[BITS1:%.*]] +; CHECK-NEXT: [[T1_HIGHBITS:%.*]] = lshr i8 [[T1]], [[BITS0:%.*]] +; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[T1_HIGHBITS]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %t0 = shl i8 1, %bits0 + %t1 = shl i8 1, %bits1 + %r = icmp ule i8 %t0, %t1 + ret i1 %r +} + ; ============================================================================ ; ; One-use tests. ; ============================================================================ ; diff --git a/llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll b/llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll index d6d7cce9ffa..d81d69efb2b 100644 --- a/llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll +++ b/llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll @@ -102,6 +102,22 @@ define i1 @c0(i8 %bits) { ret i1 %r } +; What if we have the same pattern on both sides? +define i1 @both(i8 %bits0, i8 %bits1) { +; CHECK-LABEL: @both( +; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[BITS0:%.*]] +; CHECK-NEXT: [[T2:%.*]] = shl i8 -1, [[BITS1:%.*]] +; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[T2]], [[T0]] +; CHECK-NEXT: ret i1 [[R]] +; + %t0 = shl i8 -1, %bits0 + %t1 = xor i8 %t0, -1 + %t2 = shl i8 -1, %bits1 + %t3 = xor i8 %t2, -1 + %r = icmp ult i8 %t1, %t3 + ret i1 %r +} + ; ============================================================================ ; ; One-use tests. ; ============================================================================ ; |
