4 files changed, 7 insertions, 7 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index ea01d1b0e29..daab0654a41 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -99,7 +99,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   mayHaveSideEffects = R->getValueAsBit("mayHaveSideEffects");
   neverHasSideEffects = R->getValueAsBit("neverHasSideEffects");
   hasOptionalDef = false;
-  hasVariableNumberOfOperands = false;
+  isVariadic = false;
 
   if (mayHaveSideEffects && neverHasSideEffects)
     throw R->getName() +
@@ -159,7 +159,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
       else if (Rec->isSubClassOf("OptionalDefOperand"))
         hasOptionalDef = true;
     } else if (Rec->getName() == "variable_ops") {
-      hasVariableNumberOfOperands = true;
+      isVariadic = true;
       continue;
     } else if (!Rec->isSubClassOf("RegisterClass") && 
                Rec->getName() != "ptr_rc")
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index 351a880165f..6f7a19efffa 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -99,7 +99,7 @@ namespace llvm {
     bool isReMaterializable;
     bool hasDelaySlot;
     bool usesCustomDAGSchedInserter;
-    bool hasVariableNumberOfOperands;
+    bool isVariadic;
     bool hasCtrlDep;
     bool isNotDuplicable;
     bool hasOptionalDef;
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index bd8d21058de..8502d6197a7 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -835,7 +835,7 @@ public:
       if (InstPatNode && InstPatNode->getOperator()->getName() == "set") {
         InstPatNode = InstPatNode->getChild(InstPatNode->getNumChildren()-1);
       }
-      bool HasVarOps     = isRoot && II.hasVariableNumberOfOperands;
+      bool HasVarOps     = isRoot && II.isVariadic;
       // FIXME: fix how we deal with physical register operands.
       bool HasImpInputs  = isRoot && Inst.getNumImpOperands() > 0;
       bool HasImpResults = isRoot && DstRegs.size() > 0;
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 77ee860c24a..51896b85f8b 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -320,9 +320,9 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.hasOptionalDef)     OS << "|M_HAS_OPTIONAL_DEF";
   if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
-  if (Inst.hasVariableNumberOfOperands) OS << "|M_VARIABLE_OPS";
-  if (Inst.mayHaveSideEffects)          OS << "|M_MAY_HAVE_SIDE_EFFECTS";
-  if (NeverHasSideEffects)              OS << "|M_NEVER_HAS_SIDE_EFFECTS";
+  if (Inst.isVariadic)         OS << "|M_VARIADIC";
+  if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
+  if (NeverHasSideEffects)     OS << "|M_NEVER_HAS_SIDE_EFFECTS";
   OS << ", 0";
 
   // Emit all of the target-specific flags...