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-rw-r--r--llvm/utils/TableGen/FastISelEmitter.cpp21
1 files changed, 14 insertions, 7 deletions
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index 52f9563ec72..23f09a5bd31 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -70,13 +70,16 @@ struct OperandsSignature {
for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
TreePatternNode *Op = InstPatNode->getChild(i);
// For now, filter out any operand with a predicate.
- if (!Op->getPredicateFns().empty())
- return false;
// For now, filter out any operand with multiple values.
- assert(Op->hasTypeSet() && "Type infererence not done?");
+ if (!Op->getPredicateFns().empty() ||
+ Op->getNumTypes() != 1)
+ return false;
+
+ assert(Op->hasTypeSet(0) && "Type infererence not done?");
// For now, all the operands must have the same type.
- if (Op->getType() != VT)
+ if (Op->getType(0) != VT)
return false;
+
if (!Op->isLeaf()) {
if (Op->getOperator()->getName() == "imm") {
Operands.push_back("i");
@@ -295,10 +298,14 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
Record *InstPatOp = InstPatNode->getOperator();
std::string OpcodeName = getOpcodeName(InstPatOp, CGP);
- MVT::SimpleValueType RetVT = InstPatNode->getType();
+ assert(InstPatNode->getNumTypes() <= 1);
+ MVT::SimpleValueType RetVT = MVT::isVoid;
+ if (InstPatNode->getNumTypes()) RetVT = InstPatNode->getType(0);
MVT::SimpleValueType VT = RetVT;
- if (InstPatNode->getNumChildren())
- VT = InstPatNode->getChild(0)->getType();
+ if (InstPatNode->getNumChildren()) {
+ assert(InstPatNode->getChild(0)->getNumTypes() == 1);
+ VT = InstPatNode->getChild(0)->getType(0);
+ }
// For now, filter out instructions which just set a register to
// an Operand or an immediate, like MOV32ri.
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