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author | Chris Lattner <sabre@nondot.org> | 2010-03-19 21:37:09 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-03-19 21:37:09 +0000 |
commit | f144725ebcd859009c6ee96ead4a2d09ab3d277c (patch) | |
tree | 8cef93729cb5bbf2c2e75a095e1e6c70dd20cb19 /llvm/utils/TableGen/FastISelEmitter.cpp | |
parent | f369e779a80efdf8c95b9e65560fef3fd644201d (diff) | |
download | bcm5719-llvm-f144725ebcd859009c6ee96ead4a2d09ab3d277c.tar.gz bcm5719-llvm-f144725ebcd859009c6ee96ead4a2d09ab3d277c.zip |
major surgery on tblgen: generalize TreePatternNode
to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
Diffstat (limited to 'llvm/utils/TableGen/FastISelEmitter.cpp')
-rw-r--r-- | llvm/utils/TableGen/FastISelEmitter.cpp | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index 52f9563ec72..23f09a5bd31 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -70,13 +70,16 @@ struct OperandsSignature { for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) { TreePatternNode *Op = InstPatNode->getChild(i); // For now, filter out any operand with a predicate. - if (!Op->getPredicateFns().empty()) - return false; // For now, filter out any operand with multiple values. - assert(Op->hasTypeSet() && "Type infererence not done?"); + if (!Op->getPredicateFns().empty() || + Op->getNumTypes() != 1) + return false; + + assert(Op->hasTypeSet(0) && "Type infererence not done?"); // For now, all the operands must have the same type. - if (Op->getType() != VT) + if (Op->getType(0) != VT) return false; + if (!Op->isLeaf()) { if (Op->getOperator()->getName() == "imm") { Operands.push_back("i"); @@ -295,10 +298,14 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) { Record *InstPatOp = InstPatNode->getOperator(); std::string OpcodeName = getOpcodeName(InstPatOp, CGP); - MVT::SimpleValueType RetVT = InstPatNode->getType(); + assert(InstPatNode->getNumTypes() <= 1); + MVT::SimpleValueType RetVT = MVT::isVoid; + if (InstPatNode->getNumTypes()) RetVT = InstPatNode->getType(0); MVT::SimpleValueType VT = RetVT; - if (InstPatNode->getNumChildren()) - VT = InstPatNode->getChild(0)->getType(); + if (InstPatNode->getNumChildren()) { + assert(InstPatNode->getChild(0)->getNumTypes() == 1); + VT = InstPatNode->getChild(0)->getType(0); + } // For now, filter out instructions which just set a register to // an Operand or an immediate, like MOV32ri. |