summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/utils/TableGen/AsmMatcherEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index e808661b7a5..a0283fc8017 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1479,6 +1479,8 @@ void AsmMatcherInfo::buildInfo() {
bool ReportMultipleNearMisses =
AsmParser->getValueAsBit("ReportMultipleNearMisses");
+ bool IsWebAssemblyTarget = Target.getName() == "WebAssembly";
+
// Parse the instructions; we need to do this first so that we can gather the
// singleton register classes.
SmallPtrSet<Record*, 16> SingletonRegisters;
@@ -1514,6 +1516,14 @@ void AsmMatcherInfo::buildInfo() {
if (!V.empty() && V != Variant.Name)
continue;
+ // [WebAssembly] Ignore non-stack instructions.
+ if (IsWebAssemblyTarget) {
+ auto Bit = CGI->TheDef->getValue("StackBased")->getValue()->
+ getCastTo(BitRecTy::get());
+ if (!Bit || !reinterpret_cast<const BitInit *>(Bit)->getValue())
+ continue;
+ }
+
auto II = llvm::make_unique<MatchableInfo>(*CGI);
II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
OpenPOWER on IntegriCloud