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-rw-r--r--llvm/tools/llvm-mca/InstructionInfoView.cpp11
1 files changed, 9 insertions, 2 deletions
diff --git a/llvm/tools/llvm-mca/InstructionInfoView.cpp b/llvm/tools/llvm-mca/InstructionInfoView.cpp
index 76d63d21cb2..3b1e4dc8188 100644
--- a/llvm/tools/llvm-mca/InstructionInfoView.cpp
+++ b/llvm/tools/llvm-mca/InstructionInfoView.cpp
@@ -36,9 +36,16 @@ void InstructionInfoView::printView(raw_ostream &OS) const {
for (unsigned I = 0, E = Instructions; I < E; ++I) {
const MCInst &Inst = Source.getMCInstFromIndex(I);
const MCInstrDesc &MCDesc = MCII.get(Inst.getOpcode());
- const MCSchedClassDesc &SCDesc =
- *SM.getSchedClassDesc(MCDesc.getSchedClass());
+ // Obtain the scheduling class information from the instruction.
+ unsigned SchedClassID = MCDesc.getSchedClass();
+ unsigned CPUID = SM.getProcessorID();
+
+ // Try to solve variant scheduling classes.
+ while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant())
+ SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &Inst, CPUID);
+
+ const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
unsigned NumMicroOpcodes = SCDesc.NumMicroOps;
unsigned Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
Optional<double> RThroughput =
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