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-rw-r--r--llvm/tools/llvm-exegesis/lib/X86/Target.cpp30
1 files changed, 22 insertions, 8 deletions
diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
index 594c48bbdba..f0b411cd3c4 100644
--- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -14,6 +14,7 @@
#include "MCTargetDesc/X86MCTargetDesc.h"
#include "X86.h"
#include "X86RegisterInfo.h"
+#include "X86Subtarget.h"
#include "llvm/MC/MCInstBuilder.h"
namespace exegesis {
@@ -130,8 +131,9 @@ class ExegesisX86Target : public ExegesisTarget {
PM.add(llvm::createX86FloatingPointStackifierPass());
}
- std::vector<llvm::MCInst>
- setRegToConstant(unsigned Reg) const override {
+ std::vector<llvm::MCInst> setRegToConstant(const llvm::MCSubtargetInfo &STI,
+ unsigned Reg) const override {
+ // GPR.
if (llvm::X86::GR8RegClass.contains(Reg))
return {llvm::MCInstBuilder(llvm::X86::MOV8ri).addReg(Reg).addImm(1)};
if (llvm::X86::GR16RegClass.contains(Reg))
@@ -140,12 +142,25 @@ class ExegesisX86Target : public ExegesisTarget {
return {llvm::MCInstBuilder(llvm::X86::MOV32ri).addReg(Reg).addImm(1)};
if (llvm::X86::GR64RegClass.contains(Reg))
return {llvm::MCInstBuilder(llvm::X86::MOV64ri32).addReg(Reg).addImm(1)};
- if (llvm::X86::VR128XRegClass.contains(Reg))
- return setVectorRegToConstant(Reg, 16, llvm::X86::VMOVDQUrm);
- if (llvm::X86::VR256XRegClass.contains(Reg))
+ // MMX.
+ if (llvm::X86::VR64RegClass.contains(Reg))
+ return setVectorRegToConstant(Reg, 8, llvm::X86::MMX_MOVQ64rm);
+ // {X,Y,Z}MM.
+ if (llvm::X86::VR128XRegClass.contains(Reg)) {
+ if (STI.getFeatureBits()[llvm::X86::FeatureAVX512])
+ return setVectorRegToConstant(Reg, 16, llvm::X86::VMOVDQU32Z128rm);
+ if (STI.getFeatureBits()[llvm::X86::FeatureAVX])
+ return setVectorRegToConstant(Reg, 16, llvm::X86::VMOVDQUrm);
+ return setVectorRegToConstant(Reg, 16, llvm::X86::MOVDQUrm);
+ }
+ if (llvm::X86::VR256XRegClass.contains(Reg)) {
+ if (STI.getFeatureBits()[llvm::X86::FeatureAVX512])
+ return setVectorRegToConstant(Reg, 32, llvm::X86::VMOVDQU32Z256rm);
return setVectorRegToConstant(Reg, 32, llvm::X86::VMOVDQUYrm);
+ }
if (llvm::X86::VR512RegClass.contains(Reg))
- return setVectorRegToConstant(Reg, 64, llvm::X86::VMOVDQU64Zrm);
+ return setVectorRegToConstant(Reg, 64, llvm::X86::VMOVDQU32Zrm);
+ // X87.
if (llvm::X86::RFP32RegClass.contains(Reg) ||
llvm::X86::RFP64RegClass.contains(Reg) ||
llvm::X86::RFP80RegClass.contains(Reg))
@@ -155,8 +170,7 @@ class ExegesisX86Target : public ExegesisTarget {
std::unique_ptr<BenchmarkRunner>
createLatencyBenchmarkRunner(const LLVMState &State) const override {
- return llvm::make_unique<X86BenchmarkRunner<X86LatencyImpl>>(
- State);
+ return llvm::make_unique<X86BenchmarkRunner<X86LatencyImpl>>(State);
}
std::unique_ptr<BenchmarkRunner>
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