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-rw-r--r--llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll158
-rw-r--r--llvm/test/Instrumentation/PoisonChecking/ub-checks.ll137
2 files changed, 295 insertions, 0 deletions
diff --git a/llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll b/llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll
new file mode 100644
index 00000000000..e3a0c0660fd
--- /dev/null
+++ b/llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll
@@ -0,0 +1,158 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=poison-checking -S -poison-checking-function-local < %s | FileCheck %s
+
+; This file contains tests to exercise the custom flag validation rules
+
+define i32 @add_noflags(i32 %a, i32 %b) {
+; CHECK-LABEL: @add_noflags(
+; CHECK-NEXT: [[RES:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = add i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @add_nsw(i32 %a, i32 %b) {
+; CHECK-LABEL: @add_nsw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = add nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = add nsw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @add_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @add_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = add nuw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = add nuw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @add_nsw_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @add_nsw_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
+; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP2]], [[TMP4]]
+; CHECK-NEXT: [[RES:%.*]] = add nuw nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP5]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP6]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = add nsw nuw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @sub_noflags(i32 %a, i32 %b) {
+; CHECK-LABEL: @sub_noflags(
+; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = sub i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @sub_nsw(i32 %a, i32 %b) {
+; CHECK-LABEL: @sub_nsw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = sub nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = sub nsw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @sub_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @sub_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = sub nuw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = sub nuw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @sub_nsw_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @sub_nsw_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
+; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP2]], [[TMP4]]
+; CHECK-NEXT: [[RES:%.*]] = sub nuw nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP5]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP6]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = sub nsw nuw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @mul_noflags(i32 %a, i32 %b) {
+; CHECK-LABEL: @mul_noflags(
+; CHECK-NEXT: [[RES:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = mul i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @mul_nsw(i32 %a, i32 %b) {
+; CHECK-LABEL: @mul_nsw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = mul nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = mul nsw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @mul_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @mul_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[RES:%.*]] = mul nuw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = mul nuw i32 %a, %b
+ ret i32 %res
+}
+
+define i32 @mul_nsw_nuw(i32 %a, i32 %b) {
+; CHECK-LABEL: @mul_nsw_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP3]], 1
+; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP2]], [[TMP4]]
+; CHECK-NEXT: [[RES:%.*]] = mul nuw nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP5]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP6]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %res = mul nsw nuw i32 %a, %b
+ ret i32 %res
+}
+
diff --git a/llvm/test/Instrumentation/PoisonChecking/ub-checks.ll b/llvm/test/Instrumentation/PoisonChecking/ub-checks.ll
new file mode 100644
index 00000000000..f40c8056811
--- /dev/null
+++ b/llvm/test/Instrumentation/PoisonChecking/ub-checks.ll
@@ -0,0 +1,137 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=poison-checking -S < %s | FileCheck %s
+
+; This file contains tests to exercise the UB triggering instructions with
+; a potential source of UB. The UB source is kept simple; we focus on the
+; UB triggering instructions here.
+
+define void @store(i8* %base, i32 %a) {
+; CHECK-LABEL: @store(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: [[P:%.*]] = getelementptr i8, i8* [[BASE:%.*]], i32 [[ADD]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: store i8 0, i8* [[P]]
+; CHECK-NEXT: ret void
+;
+ %add = add nsw i32 %a, 1
+ %p = getelementptr i8, i8* %base, i32 %add
+ store i8 0, i8* %p
+ ret void
+}
+
+define void @load(i8* %base, i32 %a) {
+; CHECK-LABEL: @load(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: [[P:%.*]] = getelementptr i8, i8* [[BASE:%.*]], i32 [[ADD]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[TMP4:%.*]] = load volatile i8, i8* [[P]]
+; CHECK-NEXT: ret void
+;
+ %add = add nsw i32 %a, 1
+ %p = getelementptr i8, i8* %base, i32 %add
+ load volatile i8, i8* %p
+ ret void
+}
+
+define void @atomicrmw(i8* %base, i32 %a) {
+; CHECK-LABEL: @atomicrmw(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: [[P:%.*]] = getelementptr i8, i8* [[BASE:%.*]], i32 [[ADD]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw add i8* [[P]], i8 1 seq_cst
+; CHECK-NEXT: ret void
+;
+ %add = add nsw i32 %a, 1
+ %p = getelementptr i8, i8* %base, i32 %add
+ atomicrmw add i8* %p, i8 1 seq_cst
+ ret void
+}
+
+define void @cmpxchg(i8* %base, i32 %a) {
+; CHECK-LABEL: @cmpxchg(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: [[P:%.*]] = getelementptr i8, i8* [[BASE:%.*]], i32 [[ADD]]
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[TMP4:%.*]] = cmpxchg i8* [[P]], i8 1, i8 0 seq_cst seq_cst
+; CHECK-NEXT: ret void
+;
+ %add = add nsw i32 %a, 1
+ %p = getelementptr i8, i8* %base, i32 %add
+ cmpxchg i8* %p, i8 1, i8 0 seq_cst seq_cst
+ ret void
+}
+
+define i32 @udiv(i8* %base, i32 %a) {
+; CHECK-LABEL: @udiv(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[RES:%.*]] = udiv i32 2048, [[ADD]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %add = add nuw i32 %a, 1
+ %res = udiv i32 2048, %add
+ ret i32 %res
+}
+
+define i32 @sdiv(i8* %base, i32 %a) {
+; CHECK-LABEL: @sdiv(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[RES:%.*]] = sdiv i32 2048, [[ADD]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %add = add nuw i32 %a, 1
+ %res = sdiv i32 2048, %add
+ ret i32 %res
+}
+
+define i32 @urem(i8* %base, i32 %a) {
+; CHECK-LABEL: @urem(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[RES:%.*]] = urem i32 2048, [[ADD]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %add = add nuw i32 %a, 1
+ %res = urem i32 2048, %add
+ ret i32 %res
+}
+
+define i32 @srem(i8* %base, i32 %a) {
+; CHECK-LABEL: @srem(
+; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
+; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
+; CHECK-NEXT: [[RES:%.*]] = srem i32 2048, [[ADD]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %add = add nuw i32 %a, 1
+ %res = srem i32 2048, %add
+ ret i32 %res
+}
+
+
+
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