diff options
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/PowerPC/fold-rlwinm-1.ll | 11 | ||||
-rw-r--r-- | llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 140 |
2 files changed, 145 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fold-rlwinm-1.ll b/llvm/test/CodeGen/PowerPC/fold-rlwinm-1.ll index b0586b06cd1..12887d89225 100644 --- a/llvm/test/CodeGen/PowerPC/fold-rlwinm-1.ll +++ b/llvm/test/CodeGen/PowerPC/fold-rlwinm-1.ll @@ -11,8 +11,7 @@ define void @foo(i32 signext %var1) { ; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: addis r4, r2, res@toc@ha ; CHECK-NEXT: cntlzw r3, r3 -; CHECK-NEXT: srwi r3, r3, 5 -; CHECK-NEXT: slwi r3, r3, 19 +; CHECK-NEXT: rlwinm r3, r3, 14, 0, 12 ; CHECK-NEXT: stw r3, res@toc@l(r4) ; CHECK-NEXT: blr entry: @@ -30,10 +29,10 @@ define void @foo_multiple_use(i32 signext %var1) { ; CHECK-NEXT: addis r4, r2, res2@toc@ha ; CHECK-NEXT: addis r6, r2, res@toc@ha ; CHECK-NEXT: cntlzw r3, r3 -; CHECK-NEXT: srwi r3, r3, 5 -; CHECK-NEXT: slwi r5, r3, 19 -; CHECK-NEXT: stw r3, res2@toc@l(r4) -; CHECK-NEXT: stw r5, res@toc@l(r6) +; CHECK-NEXT: srwi r5, r3, 5 +; CHECK-NEXT: rlwinm r3, r3, 14, 0, 12 +; CHECK-NEXT: stw r5, res2@toc@l(r4) +; CHECK-NEXT: stw r3, res@toc@l(r6) ; CHECK-NEXT: blr entry: %cmp = icmp eq i32 %var1, 1 diff --git a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir new file mode 100644 index 00000000000..426aaa7a763 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir @@ -0,0 +1,140 @@ +# RUN: llc -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu \ +# RUN: -run-pass ppc-mi-peepholes %s -o - -verify-machineinstrs | FileCheck %s + +--- +name: testFoldRLWINM +#CHECK : name : testFoldRLWINM +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 5, 31 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 5, 31 + %3:gprc = RLWINM %2:gprc, 19, 0, 12 + ; CHECK: %3:gprc = RLWINM %1, 14, 0, 12 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMSrcFullMask1 +#CHECK : name : testFoldRLWINMSrcFullMask1 +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 0, 31 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 0, 31 + %3:gprc = RLWINM %2:gprc, 19, 0, 12 + ; CHECK: %3:gprc = RLWINM %1, 14, 0, 12 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMSrcFullMask2 +#CHECK : name : testFoldRLWINMSrcFullMask2 +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 10, 9 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 10, 9 + %3:gprc = RLWINM %2:gprc, 19, 10, 1 + ; CHECK: %3:gprc = RLWINM %1, 14, 10, 1 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMSrcWrapped +#CHECK : name : testFoldRLWINMSrcWrapped +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 30, 10 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 30 ,10 + %3:gprc = RLWINM %2:gprc, 19, 0, 12 + ; CHECK: %3:gprc = RLWINM %1, 14, 11, 12 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMUserWrapped +#CHECK : name : testFoldRLWINMUserWrapped +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 10, 5, 31 + ; CHECKT: %2:gprc = RLWINM %1:gprc, 10, 5, 31 + %3:gprc = RLWINM %2:gprc, 10, 30, 5 + ; CHECK: %3:gprc = RLWINM %2, 10, 30, 5 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMMultipleUses +#CHECK : name : testFoldRLWINMMultipleUses +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM killed %1:gprc, 27, 5, 31 + ; CHECK: %2:gprc = RLWINM %1, 27, 5, 31 + %3:gprc = RLWINM %2:gprc, 19, 0, 12 + ; CHECK: %3:gprc = RLWINM killed %1, 14, 0, 12 + STW %3:gprc, %2:gprc, 100 + ; CHECK: STW %3, %2, 100 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMToZero +#CHECK : name : testFoldRLWINMToZero +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 5, 10 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 5, 10 + %3:gprc = RLWINM %2:gprc, 8, 5, 10 + ; CHECK: %3:gprc = LI 0 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMoToZero +#CHECK : name : testFoldRLWINMoToZero +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 27, 5, 10 + ; CHECK-NOT: %2:gprc = RLWINM %1:gprc, 27, 5, 10 + %3:gprc = RLWINMo %2:gprc, 8, 5, 10, implicit-def $cr0 + ; CHECK: %3:gprc = ANDIo %2, 0, implicit-def $cr0 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMInvalidMask +#CHECK : name : testFoldRLWINMInvalidMask +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 20, 5, 31 + ; CHECK: %2:gprc = RLWINM %1, 20, 5, 31 + %3:gprc = RLWINM %2:gprc, 19, 10, 20 + ; CHECK: %3:gprc = RLWINM %2, 19, 10, 20 + BLR8 implicit $lr8, implicit $rm +... |