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-rw-r--r--llvm/test/CodeGen/PowerPC/vsx-p9.ll23
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vsx-p9.ll b/llvm/test/CodeGen/PowerPC/vsx-p9.ll
index 1b092cfe4b1..6514bc9e97f 100644
--- a/llvm/test/CodeGen/PowerPC/vsx-p9.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-p9.ll
@@ -167,4 +167,27 @@ entry:
; Function Attrs: nounwind readnone
declare <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64>, <2 x i64>)
+define <16 x i8> @testVSLV(<16 x i8> %a, <16 x i8> %b) {
+entry:
+ %0 = tail call <16 x i8> @llvm.ppc.altivec.vslv(<16 x i8> %a, <16 x i8> %b)
+ ret <16 x i8> %0
+; CHECK-LABEL: testVSLV
+; CHECK: vslv 2, 2, 3
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <16 x i8> @llvm.ppc.altivec.vslv(<16 x i8>, <16 x i8>)
+
+; Function Attrs: nounwind readnone
+define <16 x i8> @testVSRV(<16 x i8> %a, <16 x i8> %b) {
+entry:
+ %0 = tail call <16 x i8> @llvm.ppc.altivec.vsrv(<16 x i8> %a, <16 x i8> %b)
+ ret <16 x i8> %0
+; CHECK-LABEL: testVSRV
+; CHECK: vsrv 2, 2, 3
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <16 x i8> @llvm.ppc.altivec.vsrv(<16 x i8>, <16 x i8>)
+
declare void @sink(...)
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