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-rw-r--r--llvm/test/Analysis/DemandedBits/vectors.ll136
-rw-r--r--llvm/test/Transforms/BDCE/vectors.ll24
2 files changed, 142 insertions, 18 deletions
diff --git a/llvm/test/Analysis/DemandedBits/vectors.ll b/llvm/test/Analysis/DemandedBits/vectors.ll
new file mode 100644
index 00000000000..36cde05fb7c
--- /dev/null
+++ b/llvm/test/Analysis/DemandedBits/vectors.ll
@@ -0,0 +1,136 @@
+; RUN: opt -S -demanded-bits -analyze < %s | FileCheck %s
+; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s
+
+; CHECK-DAG: DemandedBits: 0xff00 for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff00 for %y = or <2 x i32> %b, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff00 for %z = or <2 x i32> %x, %y
+; CHECK-DAG: DemandedBits: 0xff for %u = lshr <2 x i32> %z, <i32 8, i32 8>
+; CHECK-DAG: DemandedBits: 0xff for %r = trunc <2 x i32> %u to <2 x i8>
+define <2 x i8> @test_basic(<2 x i32> %a, <2 x i32> %b) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = or <2 x i32> %b, zeroinitializer
+ %z = or <2 x i32> %x, %y
+ %u = lshr <2 x i32> %z, <i32 8, i32 8>
+ %r = trunc <2 x i32> %u to <2 x i8>
+ ret <2 x i8> %r
+}
+
+; Vector-specific instructions
+
+; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0 for %z = extractelement <2 x i32> %x, i32 1
+; CHECK-DAG: DemandedBits: 0xf for %y = extractelement <2 x i32> %x, i32 0
+; CHECK-DAG: DemandedBits: 0xffffffff for %u = and i32 %y, 15
+; CHECK-DAG: DemandedBits: 0xffffffff for %v = and i32 %z, 240
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = or i32 %u, %v
+define i32 @test_extractelement(<2 x i32> %a) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = extractelement <2 x i32> %x, i32 0
+ %z = extractelement <2 x i32> %x, i32 1
+ %u = and i32 %y, 15
+ %v = and i32 %z, 240
+ %r = or i32 %u, %v
+ ret i32 %r
+}
+
+; CHECK-DAG: DemandedBits: 0xff for %x = or i32 %a, 0
+; CHECK-DAG: DemandedBits: 0xff for %y = or i32 %b, 0
+; CHECK-DAG: DemandedBits: 0xff for %z = insertelement <2 x i32> undef, i32 %x, i32 0
+; CHECK-DAG: DemandedBits: 0xff for %u = insertelement <2 x i32> %z, i32 %y, i32 1
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %u, <i32 255, i32 127>
+define <2 x i32> @test_insertelement(i32 %a, i32 %b) {
+ %x = or i32 %a, 0
+ %y = or i32 %b, 0
+ %z = insertelement <2 x i32> undef, i32 %x, i32 0
+ %u = insertelement <2 x i32> %z, i32 %y, i32 1
+ %r = and <2 x i32> %u, <i32 255, i32 127>
+ ret <2 x i32> %r
+}
+
+; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff for %y = or <2 x i32> %b, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff for %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
+define <3 x i32> @test_shufflevector(<2 x i32> %a, <2 x i32> %b) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = or <2 x i32> %b, zeroinitializer
+ %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
+ %r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
+ ret <3 x i32> %r
+}
+
+; Shifts with splat shift amounts
+
+; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0 for %y = shl <2 x i32> %x, <i32 4, i32 4>
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
+define <2 x i32> @test_shl(<2 x i32> %a) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = shl <2 x i32> %x, <i32 4, i32 4>
+ %r = and <2 x i32> %y, <i32 240, i32 240>
+ ret <2 x i32> %r
+}
+
+; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0 for %y = ashr <2 x i32> %x, <i32 4, i32 4>
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
+define <2 x i32> @test_ashr(<2 x i32> %a) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = ashr <2 x i32> %x, <i32 4, i32 4>
+ %r = and <2 x i32> %y, <i32 240, i32 240>
+ ret <2 x i32> %r
+}
+
+; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0 for %y = lshr <2 x i32> %x, <i32 4, i32 4>
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
+define <2 x i32> @test_lshr(<2 x i32> %a) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = lshr <2 x i32> %x, <i32 4, i32 4>
+ %r = and <2 x i32> %y, <i32 240, i32 240>
+ ret <2 x i32> %r
+}
+
+declare <2 x i32> @llvm.fshl.i32(<2 x i32>, <2 x i32>, <2 x i32>)
+declare <2 x i32> @llvm.fshr.i32(<2 x i32>, <2 x i32>, <2 x i32>)
+
+; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %z, <i32 255, i32 255>
+define <2 x i32> @test_fshl(<2 x i32> %a, <2 x i32> %b) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = or <2 x i32> %b, zeroinitializer
+ %z = call <2 x i32> @llvm.fshl.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
+ %r = and <2 x i32> %z, <i32 255, i32 255>
+ ret <2 x i32> %r
+}
+
+; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
+; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
+; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %z, <i32 255, i32 255>
+define <2 x i32> @test_fshr(<2 x i32> %a, <2 x i32> %b) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %y = or <2 x i32> %b, zeroinitializer
+ %z = call <2 x i32> @llvm.fshr.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
+ %r = and <2 x i32> %z, <i32 255, i32 255>
+ ret <2 x i32> %r
+}
+
+; FP / Int conversion. These have different input / output types.
+
+; CHECK-DAG: DemandedBits: 0xffffffff for %x = or <2 x i32> %a, zeroinitializer
+define <2 x float> @test_uitofp(<2 x i32> %a) {
+ %x = or <2 x i32> %a, zeroinitializer
+ %r = uitofp <2 x i32> %x to <2 x float>
+ ret <2 x float> %r
+}
+
+; CHECK-DAG: DemandedBits: 0xffffffff for %y = fptoui <2 x float> %x to <2 x i32>
+define <2 x i32> @test_fptoui(<2 x float> %a) {
+ %x = fadd <2 x float> %a, <float 1.0, float 1.0>
+ %y = fptoui <2 x float> %x to <2 x i32>
+ %r = and <2 x i32> %y, <i32 255, i32 255>
+ ret <2 x i32> %y
+}
diff --git a/llvm/test/Transforms/BDCE/vectors.ll b/llvm/test/Transforms/BDCE/vectors.ll
index d5ac1504439..fde22fd36b7 100644
--- a/llvm/test/Transforms/BDCE/vectors.ll
+++ b/llvm/test/Transforms/BDCE/vectors.ll
@@ -7,12 +7,9 @@
define <2 x i32> @test_basic(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: @test_basic(
-; CHECK-NEXT: [[A2:%.*]] = add <2 x i32> [[A:%.*]], <i32 1, i32 1>
-; CHECK-NEXT: [[A3:%.*]] = and <2 x i32> [[A2]], <i32 4, i32 4>
; CHECK-NEXT: [[B2:%.*]] = add <2 x i32> [[B:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[B3:%.*]] = and <2 x i32> [[B2]], <i32 8, i32 8>
-; CHECK-NEXT: [[C:%.*]] = or <2 x i32> [[A3]], [[B3]]
-; CHECK-NEXT: [[D:%.*]] = ashr <2 x i32> [[C]], <i32 3, i32 3>
+; CHECK-NEXT: [[D:%.*]] = ashr <2 x i32> [[B3]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i32> [[D]]
;
; CHECK-IO-LABEL: @test_basic(
@@ -36,12 +33,9 @@ define <2 x i32> @test_basic(<2 x i32> %a, <2 x i32> %b) {
; Going vector -> scalar
define i32 @test_extractelement(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: @test_extractelement(
-; CHECK-NEXT: [[A2:%.*]] = add <2 x i32> [[A:%.*]], <i32 1, i32 1>
-; CHECK-NEXT: [[A3:%.*]] = and <2 x i32> [[A2]], <i32 4, i32 4>
; CHECK-NEXT: [[B2:%.*]] = add <2 x i32> [[B:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[B3:%.*]] = and <2 x i32> [[B2]], <i32 8, i32 8>
-; CHECK-NEXT: [[C:%.*]] = or <2 x i32> [[A3]], [[B3]]
-; CHECK-NEXT: [[D:%.*]] = extractelement <2 x i32> [[C]], i32 0
+; CHECK-NEXT: [[D:%.*]] = extractelement <2 x i32> [[B3]], i32 0
; CHECK-NEXT: [[E:%.*]] = ashr i32 [[D]], 3
; CHECK-NEXT: ret i32 [[E]]
;
@@ -68,14 +62,10 @@ define i32 @test_extractelement(<2 x i32> %a, <2 x i32> %b) {
; Going scalar -> vector
define <2 x i32> @test_insertelement(i32 %a, i32 %b) {
; CHECK-LABEL: @test_insertelement(
-; CHECK-NEXT: [[X:%.*]] = insertelement <2 x i32> undef, i32 [[A:%.*]], i32 0
-; CHECK-NEXT: [[X2:%.*]] = insertelement <2 x i32> [[X]], i32 [[B:%.*]], i32 1
-; CHECK-NEXT: [[X3:%.*]] = and <2 x i32> [[X2]], <i32 4, i32 4>
-; CHECK-NEXT: [[Y:%.*]] = insertelement <2 x i32> undef, i32 [[B]], i32 0
-; CHECK-NEXT: [[Y2:%.*]] = insertelement <2 x i32> [[Y]], i32 [[A]], i32 1
+; CHECK-NEXT: [[Y:%.*]] = insertelement <2 x i32> undef, i32 [[B:%.*]], i32 0
+; CHECK-NEXT: [[Y2:%.*]] = insertelement <2 x i32> [[Y]], i32 [[A:%.*]], i32 1
; CHECK-NEXT: [[Y3:%.*]] = and <2 x i32> [[Y2]], <i32 8, i32 8>
-; CHECK-NEXT: [[Z:%.*]] = or <2 x i32> [[X3]], [[Y3]]
-; CHECK-NEXT: [[U:%.*]] = ashr <2 x i32> [[Z]], <i32 3, i32 3>
+; CHECK-NEXT: [[U:%.*]] = ashr <2 x i32> [[Y3]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i32> [[U]]
;
; CHECK-IO-LABEL: @test_insertelement(
@@ -132,10 +122,8 @@ define <2 x i32> @test_conversion(<2 x i32> %a) {
; Assumption invalidation (adapted from invalidate-assumptions.ll)
define <2 x i1> @test_assumption_invalidation(<2 x i1> %b, <2 x i8> %x) {
; CHECK-LABEL: @test_assumption_invalidation(
-; CHECK-NEXT: [[SETBIT:%.*]] = or <2 x i8> [[X:%.*]], <i8 64, i8 64>
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext <2 x i1> [[B:%.*]] to <2 x i8>
-; CHECK-NEXT: [[BIG_NUMBER:%.*]] = shl <2 x i8> [[SETBIT]], <i8 1, i8 1>
-; CHECK-NEXT: [[SUB:%.*]] = sub nuw <2 x i8> [[BIG_NUMBER]], [[LITTLE_NUMBER]]
+; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> zeroinitializer, [[LITTLE_NUMBER]]
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i8> [[SUB]] to <2 x i1>
; CHECK-NEXT: ret <2 x i1> [[TRUNC]]
;
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