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-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt5
-rw-r--r--llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt10
-rw-r--r--llvm/test/MC/Mips/micromips-dsp/valid.s5
-rw-r--r--llvm/test/MC/Mips/micromips-dspr2/valid.s10
4 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
index 93a7f966a56..2bae34e2d83 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
@@ -67,3 +67,8 @@
0x00 0xc4 0x56 0xbc # CHECK: dpsq_sa.l.w $ac1, $4, $6
0x00 0xc4 0x64 0xbc # CHECK: dpsu.h.qbl $ac1, $4, $6
0x00 0xc4 0x74 0xbc # CHECK: dpsu.h.qbr $ac1, $4, $6
+0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
+0x00 0x62 0x08 0x65 # CHECK: muleq_s.w.phr $1, $2, $3
+0x00 0x62 0x08 0x95 # CHECK: muleu_s.ph.qbl $1, $2, $3
+0x00 0x62 0x08 0xd5 # CHECK: muleu_s.ph.qbr $1, $2, $3
+0x00,0x62,0x09,0x15 # CHECK: mulq_rs.ph $1, $2, $3
diff --git a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
index c1d076365b8..d35f3f0019d 100644
--- a/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
+++ b/llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt
@@ -98,3 +98,13 @@
0x00 0xc4 0x66 0xbc # CHECK: dpsqx_s.w.ph $ac1, $4, $6
0x00 0xc4 0x76 0xbc # CHECK: dpsqx_sa.w.ph $ac1, $4, $6
0x00 0xc4 0x54 0xbc # CHECK: dpsx.w.ph $ac1, $4, $6
+0x00 0x62 0x08 0x2d # CHECK: mul.ph $1, $2, $3
+0x00 0x62 0x0c 0x2d # CHECK: mul_s.ph $1, $2, $3
+0x00 0x62 0x09 0x95 # CHECK: mulq_rs.w $1, $2, $3
+0x00 0x62 0x09 0x55 # CHECK: mulq_s.ph $1, $2, $3
+0x00 0x62 0x09 0xd5 # CHECK: mulq_s.w $1, $2, $3
+0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
+0x00 0x62 0x08 0x65 # CHECK: muleq_s.w.phr $1, $2, $3
+0x00 0x62 0x08 0x95 # CHECK: muleu_s.ph.qbl $1, $2, $3
+0x00 0x62 0x08 0xd5 # CHECK: muleu_s.ph.qbr $1, $2, $3
+0x00,0x62,0x09,0x15 # CHECK: mulq_rs.ph $1, $2, $3
diff --git a/llvm/test/MC/Mips/micromips-dsp/valid.s b/llvm/test/MC/Mips/micromips-dsp/valid.s
index fb13144b25e..a78f6c1bf21 100644
--- a/llvm/test/MC/Mips/micromips-dsp/valid.s
+++ b/llvm/test/MC/Mips/micromips-dsp/valid.s
@@ -68,3 +68,8 @@
dpsq_sa.l.w $ac1, $4, $6 # CHECK: dpsq_sa.l.w $ac1, $4, $6 # encoding: [0x00,0xc4,0x56,0xbc]
dpsu.h.qbl $ac1, $4, $6 # CHECK: dpsu.h.qbl $ac1, $4, $6 # encoding: [0x00,0xc4,0x64,0xbc]
dpsu.h.qbr $ac1, $4, $6 # CHECK: dpsu.h.qbr $ac1, $4, $6 # encoding: [0x00,0xc4,0x74,0xbc]
+ muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
+ muleq_s.w.phr $1, $2, $3 # CHECK: muleq_s.w.phr $1, $2, $3 # encoding: [0x00,0x62,0x08,0x65]
+ muleu_s.ph.qbl $1, $2, $3 # CHECK: muleu_s.ph.qbl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x95]
+ muleu_s.ph.qbr $1, $2, $3 # CHECK: muleu_s.ph.qbr $1, $2, $3 # encoding: [0x00,0x62,0x08,0xd5]
+ mulq_rs.ph $1, $2, $3 # CHECK: mulq_rs.ph $1, $2, $3 # encoding: [0x00,0x62,0x09,0x15]
diff --git a/llvm/test/MC/Mips/micromips-dspr2/valid.s b/llvm/test/MC/Mips/micromips-dspr2/valid.s
index 8978c54c8ef..37949d4f561 100644
--- a/llvm/test/MC/Mips/micromips-dspr2/valid.s
+++ b/llvm/test/MC/Mips/micromips-dspr2/valid.s
@@ -99,3 +99,13 @@
dpsqx_s.w.ph $ac1, $4, $6 # CHECK: dpsqx_s.w.ph $ac1, $4, $6 # encoding: [0x00,0xc4,0x66,0xbc]
dpsqx_sa.w.ph $ac1, $4, $6 # CHECK: dpsqx_sa.w.ph $ac1, $4, $6 # encoding: [0x00,0xc4,0x76,0xbc]
dpsx.w.ph $ac1, $4, $6 # CHECK: dpsx.w.ph $ac1, $4, $6 # encoding: [0x00,0xc4,0x54,0xbc]
+ mul.ph $1, $2, $3 # CHECK: mul.ph $1, $2, $3 # encoding: [0x00,0x62,0x08,0x2d]
+ mul_s.ph $1, $2, $3 # CHECK: mul_s.ph $1, $2, $3 # encoding: [0x00,0x62,0x0c,0x2d]
+ mulq_rs.w $1, $2, $3 # CHECK: mulq_rs.w $1, $2, $3 # encoding: [0x00,0x62,0x09,0x95]
+ mulq_s.ph $1, $2, $3 # CHECK: mulq_s.ph $1, $2, $3 # encoding: [0x00,0x62,0x09,0x55]
+ mulq_s.w $1, $2, $3 # CHECK: mulq_s.w $1, $2, $3 # encoding: [0x00,0x62,0x09,0xd5]
+ muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
+ muleq_s.w.phr $1, $2, $3 # CHECK: muleq_s.w.phr $1, $2, $3 # encoding: [0x00,0x62,0x08,0x65]
+ muleu_s.ph.qbl $1, $2, $3 # CHECK: muleu_s.ph.qbl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x95]
+ muleu_s.ph.qbr $1, $2, $3 # CHECK: muleu_s.ph.qbr $1, $2, $3 # encoding: [0x00,0x62,0x08,0xd5]
+ mulq_rs.ph $1, $2, $3 # CHECK: mulq_rs.ph $1, $2, $3 # encoding: [0x00,0x62,0x09,0x15]
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