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-rw-r--r--llvm/test/MC/ARM/basic-arm-instructions.s2
-rw-r--r--llvm/test/MC/ARM/basic-thumb2-instructions.s4
-rw-r--r--llvm/test/MC/ARM/invalid-hint-arm.s7
-rw-r--r--llvm/test/MC/ARM/invalid-hint-thumb.s9
-rw-r--r--llvm/test/MC/Disassembler/ARM/invalid-hint-arm.txt13
-rw-r--r--llvm/test/MC/Disassembler/ARM/invalid-hint-thumb.txt8
6 files changed, 37 insertions, 6 deletions
diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s
index 0b7f2f9dbdb..71b5b5da09b 100644
--- a/llvm/test/MC/ARM/basic-arm-instructions.s
+++ b/llvm/test/MC/ARM/basic-arm-instructions.s
@@ -2870,7 +2870,6 @@ Lforward:
wfilt
yield
yieldne
- hint #5
hint #4
hint #3
hint #2
@@ -2883,7 +2882,6 @@ Lforward:
@ CHECK: wfilt @ encoding: [0x03,0xf0,0x20,0xb3]
@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
@ CHECK: yieldne @ encoding: [0x01,0xf0,0x20,0x13]
-@ CHECK-NOT: hint #5
@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3]
@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3]
@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s
index 9278a2a94b5..8127feba6d4 100644
--- a/llvm/test/MC/ARM/basic-thumb2-instructions.s
+++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s
@@ -3486,8 +3486,6 @@ _func:
wfelt
wfige
yieldlt
- hint #5
- hint.w #5
hint.w #4
hint #3
hint #2
@@ -3501,8 +3499,6 @@ _func:
@ CHECK: wfelt @ encoding: [0x20,0xbf]
@ CHECK: wfige @ encoding: [0x30,0xbf]
@ CHECK: yieldlt @ encoding: [0x10,0xbf]
-@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80]
-@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80]
@ CHECK: sev.w @ encoding: [0xaf,0xf3,0x04,0x80]
@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80]
@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80]
diff --git a/llvm/test/MC/ARM/invalid-hint-arm.s b/llvm/test/MC/ARM/invalid-hint-arm.s
new file mode 100644
index 00000000000..e0cd97a1902
--- /dev/null
+++ b/llvm/test/MC/ARM/invalid-hint-arm.s
@@ -0,0 +1,7 @@
+@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s
+
+hint #5
+hint #100
+
+@ CHECK: error: immediate operand must be in the range [0,4]
+@ CHECK: error: immediate operand must be in the range [0,4]
diff --git a/llvm/test/MC/ARM/invalid-hint-thumb.s b/llvm/test/MC/ARM/invalid-hint-thumb.s
new file mode 100644
index 00000000000..fd0a761da27
--- /dev/null
+++ b/llvm/test/MC/ARM/invalid-hint-thumb.s
@@ -0,0 +1,9 @@
+@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s
+
+hint #5
+hint.w #5
+hint #100
+
+@ CHECK: error: immediate operand must be in the range [0,4]
+@ CHECK: error: immediate operand must be in the range [0,4]
+@ CHECK: error: immediate operand must be in the range [0,4]
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-hint-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-hint-arm.txt
new file mode 100644
index 00000000000..7da96d8f15c
--- /dev/null
+++ b/llvm/test/MC/Disassembler/ARM/invalid-hint-arm.txt
@@ -0,0 +1,13 @@
+# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble < %s 2>&1 | FileCheck %s
+
+#------------------------------------------------------------------------------
+# Undefined encoding space for hint instructions
+#------------------------------------------------------------------------------
+
+0x05 0xf0 0x20 0xe3
+# CHECK: invalid instruction encoding
+0x41 0xf0 0x20 0xe3
+# CHECK: invalid instruction encoding
+0xfe 0xf0 0x20 0xe3
+# CHECK: invalid instruction encoding
+
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-hint-thumb.txt b/llvm/test/MC/Disassembler/ARM/invalid-hint-thumb.txt
new file mode 100644
index 00000000000..1e4133668b8
--- /dev/null
+++ b/llvm/test/MC/Disassembler/ARM/invalid-hint-thumb.txt
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple=thumbv7 -disassemble -show-encoding < %s 2>&1 | FileCheck %s
+
+#------------------------------------------------------------------------------
+# Undefined encoding space for hint instructions
+#------------------------------------------------------------------------------
+
+0xaf 0xf3 0x05 0x80
+# CHECK: invalid instruction encoding
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