18 files changed, 583 insertions, 0 deletions
diff --git a/llvm/test/MC/AArch64/SVE/andv-diagnostics.s b/llvm/test/MC/AArch64/SVE/andv-diagnostics.s
new file mode 100644
index 00000000000..60a42f82604
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/andv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+andv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: andv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+andv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: andv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+andv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: andv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+andv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: andv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+andv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: andv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/andv.s b/llvm/test/MC/AArch64/SVE/andv.s
new file mode 100644
index 00000000000..da0ec1f5ed5
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/andv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+andv b0, p7, z31.b
+// CHECK-INST: andv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x1a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 1a 04 <unknown>
+
+andv h0, p7, z31.h
+// CHECK-INST: andv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x5a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 5a 04 <unknown>
+
+andv s0, p7, z31.s
+// CHECK-INST: andv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x9a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 9a 04 <unknown>
+
+andv d0, p7, z31.d
+// CHECK-INST: andv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xda,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f da 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/eorv-diagnostics.s b/llvm/test/MC/AArch64/SVE/eorv-diagnostics.s
new file mode 100644
index 00000000000..c182615be5d
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/eorv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+eorv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: eorv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+eorv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: eorv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+eorv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: eorv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+eorv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: eorv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+eorv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: eorv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/eorv.s b/llvm/test/MC/AArch64/SVE/eorv.s
new file mode 100644
index 00000000000..3b65447bdff
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/eorv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+eorv b0, p7, z31.b
+// CHECK-INST: eorv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x19,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 19 04 <unknown>
+
+eorv h0, p7, z31.h
+// CHECK-INST: eorv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x59,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 59 04 <unknown>
+
+eorv s0, p7, z31.s
+// CHECK-INST: eorv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x99,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 99 04 <unknown>
+
+eorv d0, p7, z31.d
+// CHECK-INST: eorv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xd9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f d9 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/orv-diagnostics.s b/llvm/test/MC/AArch64/SVE/orv-diagnostics.s
new file mode 100644
index 00000000000..8a64ad89c00
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/orv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+orv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: orv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+orv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: orv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+orv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: orv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+orv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: orv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+orv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: orv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/orv.s b/llvm/test/MC/AArch64/SVE/orv.s
new file mode 100644
index 00000000000..8ae0371ccf9
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/orv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+orv b0, p7, z31.b
+// CHECK-INST: orv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x18,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 18 04 <unknown>
+
+orv h0, p7, z31.h
+// CHECK-INST: orv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x58,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 58 04 <unknown>
+
+orv s0, p7, z31.s
+// CHECK-INST: orv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x98,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 98 04 <unknown>
+
+orv d0, p7, z31.d
+// CHECK-INST: orv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xd8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f d8 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/saddv-diagnostics.s b/llvm/test/MC/AArch64/SVE/saddv-diagnostics.s
new file mode 100644
index 00000000000..e387e07735a
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/saddv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+saddv s0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: saddv s0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+saddv s0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: saddv s0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+saddv s0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: saddv s0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+saddv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: saddv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+saddv d0, p8, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: saddv d0, p8, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/saddv.s b/llvm/test/MC/AArch64/SVE/saddv.s
new file mode 100644
index 00000000000..28a64d7181b
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/saddv.s
@@ -0,0 +1,26 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+saddv d0, p7, z31.b
+// CHECK-INST: saddv	d0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x00,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 00 04 <unknown>
+
+saddv d0, p7, z31.h
+// CHECK-INST: saddv	d0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x40,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 40 04 <unknown>
+
+saddv d0, p7, z31.s
+// CHECK-INST: saddv	d0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x80,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 80 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/smaxv-diagnostics.s b/llvm/test/MC/AArch64/SVE/smaxv-diagnostics.s
new file mode 100644
index 00000000000..62936022f44
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/smaxv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+smaxv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: smaxv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smaxv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: smaxv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smaxv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: smaxv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smaxv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: smaxv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+smaxv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: smaxv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/smaxv.s b/llvm/test/MC/AArch64/SVE/smaxv.s
new file mode 100644
index 00000000000..bb0b62783a7
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/smaxv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+smaxv b0, p7, z31.b
+// CHECK-INST: smaxv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x08,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 08 04 <unknown>
+
+smaxv h0, p7, z31.h
+// CHECK-INST: smaxv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x48,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 48 04 <unknown>
+
+smaxv s0, p7, z31.s
+// CHECK-INST: smaxv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x88,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 88 04 <unknown>
+
+smaxv d0, p7, z31.d
+// CHECK-INST: smaxv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xc8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f c8 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/sminv-diagnostics.s b/llvm/test/MC/AArch64/SVE/sminv-diagnostics.s
new file mode 100644
index 00000000000..85f55772f89
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/sminv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+sminv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sminv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sminv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sminv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sminv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sminv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sminv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: sminv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+sminv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: sminv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/sminv.s b/llvm/test/MC/AArch64/SVE/sminv.s
new file mode 100644
index 00000000000..6490813fdec
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/sminv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+sminv b0, p7, z31.b
+// CHECK-INST: sminv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x0a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 0a 04 <unknown>
+
+sminv h0, p7, z31.h
+// CHECK-INST: sminv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x4a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 4a 04 <unknown>
+
+sminv s0, p7, z31.s
+// CHECK-INST: sminv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x8a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 8a 04 <unknown>
+
+sminv d0, p7, z31.d
+// CHECK-INST: sminv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xca,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f ca 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/uaddv-diagnostics.s b/llvm/test/MC/AArch64/SVE/uaddv-diagnostics.s
new file mode 100644
index 00000000000..11ec959913b
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/uaddv-diagnostics.s
@@ -0,0 +1,29 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+uaddv s0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: uaddv s0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uaddv s0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: uaddv s0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uaddv s0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: uaddv s0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+uaddv d0, p8, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: uaddv d0, p8, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/uaddv.s b/llvm/test/MC/AArch64/SVE/uaddv.s
new file mode 100644
index 00000000000..07da5ab7ae2
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/uaddv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+uaddv d0, p7, z31.b
+// CHECK-INST: uaddv	d0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x01,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 01 04 <unknown>
+
+uaddv d0, p7, z31.h
+// CHECK-INST: uaddv	d0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x41,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 41 04 <unknown>
+
+uaddv d0, p7, z31.s
+// CHECK-INST: uaddv	d0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x81,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 81 04 <unknown>
+
+uaddv d0, p7, z31.d
+// CHECK-INST: uaddv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f c1 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/umaxv-diagnostics.s b/llvm/test/MC/AArch64/SVE/umaxv-diagnostics.s
new file mode 100644
index 00000000000..cfcabb9a8b2
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/umaxv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+umaxv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: umaxv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umaxv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: umaxv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umaxv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: umaxv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umaxv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: umaxv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+umaxv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: umaxv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/umaxv.s b/llvm/test/MC/AArch64/SVE/umaxv.s
new file mode 100644
index 00000000000..c573e1bc2c6
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/umaxv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+umaxv b0, p7, z31.b
+// CHECK-INST: umaxv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x09,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 09 04 <unknown>
+
+umaxv h0, p7, z31.h
+// CHECK-INST: umaxv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x49,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 49 04 <unknown>
+
+umaxv s0, p7, z31.s
+// CHECK-INST: umaxv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x89,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 89 04 <unknown>
+
+umaxv d0, p7, z31.d
+// CHECK-INST: umaxv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xc9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f c9 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/uminv-diagnostics.s b/llvm/test/MC/AArch64/SVE/uminv-diagnostics.s
new file mode 100644
index 00000000000..9208dc9a11f
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/uminv-diagnostics.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid destination or source register.
+
+uminv d0, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: uminv d0, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uminv d0, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: uminv d0, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uminv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: uminv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+uminv v0.2d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: uminv v0.2d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+uminv h0, p8, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: uminv h0, p8, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SVE/uminv.s b/llvm/test/MC/AArch64/SVE/uminv.s
new file mode 100644
index 00000000000..e2512dad0a8
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/uminv.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+uminv b0, p7, z31.b
+// CHECK-INST: uminv	b0, p7, z31.b
+// CHECK-ENCODING: [0xe0,0x3f,0x0b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 0b 04 <unknown>
+
+uminv h0, p7, z31.h
+// CHECK-INST: uminv	h0, p7, z31.h
+// CHECK-ENCODING: [0xe0,0x3f,0x4b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 4b 04 <unknown>
+
+uminv s0, p7, z31.s
+// CHECK-INST: uminv	s0, p7, z31.s
+// CHECK-ENCODING: [0xe0,0x3f,0x8b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f 8b 04 <unknown>
+
+uminv d0, p7, z31.d
+// CHECK-INST: uminv	d0, p7, z31.d
+// CHECK-ENCODING: [0xe0,0x3f,0xcb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3f cb 04 <unknown>