diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/machine-copy-prop.mir | 103 |
3 files changed, 108 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll index 67f1d22c717..6cf4b4c3e55 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll @@ -10,11 +10,10 @@ declare double @llvm.AMDGPU.rsq.clamped.f64(double) nounwind readnone ; TODO: this constant should be folded: ; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1 ; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff -; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]] -; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]] +; VI: s_mov_b32 s[[LOW:[0-9+]]], s[[ALLBITS]] +; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW]]:[[HIGH1]]] ; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff -; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]] -; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW2]]:[[HIGH2]]] +; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW]]:[[HIGH2]]] define void @rsq_clamped_f64(double addrspace(1)* %out, double %src) nounwind { %rsq_clamped = call double @llvm.AMDGPU.rsq.clamped.f64(double %src) nounwind readnone diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll index ede1df76f2e..52292f6daa5 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll @@ -28,11 +28,10 @@ define void @rsq_clamp_f32(float addrspace(1)* %out, float %src) #0 { ; TODO: this constant should be folded: ; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1 ; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff -; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]] -; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]] +; VI: s_mov_b32 s[[LOW:[0-9+]]], s[[ALLBITS]] +; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW]]:[[HIGH1]]] ; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff -; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]] -; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW2]]:[[HIGH2]]] +; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW]]:[[HIGH2]]] define void @rsq_clamp_f64(double addrspace(1)* %out, double %src) #0 { %rsq_clamp = call double @llvm.amdgcn.rsq.clamp.f64(double %src) store double %rsq_clamp, double addrspace(1)* %out diff --git a/llvm/test/CodeGen/X86/machine-copy-prop.mir b/llvm/test/CodeGen/X86/machine-copy-prop.mir index cf566edf253..a9b9c57bcc5 100644 --- a/llvm/test/CodeGen/X86/machine-copy-prop.mir +++ b/llvm/test/CodeGen/X86/machine-copy-prop.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -run-pass machine-cp -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s --- | declare void @foo() @@ -6,8 +6,14 @@ define void @copyprop_remove_kill1() { ret void } define void @copyprop_remove_kill2() { ret void } define void @copyprop0() { ret void } + define void @copyprop1() { ret void } + define void @copyprop2() { ret void } define void @nocopyprop0() { ret void } define void @nocopyprop1() { ret void } + define void @nocopyprop2() { ret void } + define void @nocopyprop3() { ret void } + define void @nocopyprop4() { ret void } + define void @nocopyprop5() { ret void } ... --- # The second copy is redundant and will be removed, check that we also remove @@ -79,6 +85,38 @@ body: | NOOP implicit %rax, implicit %rdi ... --- +# The 2nd copy is redundant; The call preserves the source and dest register. +# CHECK-LABEL: name: copyprop1 +# CHECK: bb.0: +# CHECK-NEXT: %rax = COPY %rdi +# CHECK-NEXT: NOOP implicit %rax +# CHECK-NEXT: NOOP implicit %rax, implicit %rdi +name: copyprop1 +body: | + bb.0: + %rax = COPY %rdi + NOOP implicit killed %rax + %rax = COPY %rdi + NOOP implicit %rax, implicit %rdi +... +--- +# CHECK-LABEL: name: copyprop2 +# CHECK: bb.0: +# CHECK-NEXT: %rax = COPY %rdi +# CHECK-NEXT: NOOP implicit %ax +# CHECK-NEXT: CALL64pcrel32 @foo, csr_64_rt_mostregs +# CHECK-NOT: %rax = COPY %rdi +# CHECK-NEXT: NOOP implicit %rax, implicit %rdi +name: copyprop2 +body: | + bb.0: + %rax = COPY %rdi + NOOP implicit killed %ax + CALL64pcrel32 @foo, csr_64_rt_mostregs + %rax = COPY %rdi + NOOP implicit %rax, implicit %rdi +... +--- # The second copy is not redundant if the source register (%rax) is clobbered # even if the dest (%rbp) is not. # CHECK-LABEL: name: nocopyprop0 @@ -112,3 +150,66 @@ body: | %rax = COPY %rbp NOOP implicit %rax, implicit %rbp ... +--- +# The second copy is not redundant if the source register (%rax) is clobbered +# even if the dest (%rbp) is not. +# CHECK-LABEL: name: nocopyprop2 +# CHECK: bb.0: +# CHECK-NEXT: %rax = COPY %rbp +# CHECK-NEXT: CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp +# CHECK-NEXT: %rax = COPY %rbp +# CHECK-NEXT: NOOP implicit %rax, implicit %rbp +name: nocopyprop2 +body: | + bb.0: + %rax = COPY %rbp + CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp + %rax = COPY %rbp + NOOP implicit %rax, implicit %rbp +... +--- +# The second copy is not redundant if the dest register (%rax) is clobbered +# even if the source (%rbp) is not. +# CHECK-LABEL: name: nocopyprop3 +# CHECK: bb.0: +# CHECK-NEXT: %rbp = COPY %rax +# CHECK-NEXT: CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp +# CHECK-NEXT: %rbp = COPY %rax +# CHECK-NEXT: NOOP implicit %rax, implicit %rbp +name: nocopyprop3 +body: | + bb.0: + %rbp = COPY %rax + CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp + %rbp = COPY %rax + NOOP implicit %rax, implicit %rbp +... +--- +# A reserved register may change its value so the 2nd copy is not redundant. +# CHECK-LABEL: name: nocopyprop4 +# CHECK: bb.0: +# CHECK-NEXT: %rax = COPY %rip +# CHECK-NEXT: NOOP implicit %rax +# CHECK-NEXT: %rax = COPY %rip +# CHECK-NEXT: NOOP implicit %rax +name: nocopyprop4 +body: | + bb.0: + %rax = COPY %rip + NOOP implicit %rax + %rax = COPY %rip + NOOP implicit %rax +... +--- +# Writing to a reserved register may have additional effects (slightly illegal +# testcase because writing to %rip like this should make the instruction a jump) +# CHECK-LABEL: name: nocopyprop5 +# CHECK: bb.0: +# CHECK-NEXT: %rip = COPY %rax +# CHECK-NEXT: %rip = COPY %rax +name: nocopyprop5 +body: | + bb.0: + %rip = COPY %rax + %rip = COPY %rax +... |
