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-rw-r--r--llvm/test/CodeGen/Mips/octeon.ll15
-rw-r--r--llvm/test/CodeGen/Mips/octeon_popcnt.ll47
-rw-r--r--llvm/test/MC/Mips/octeon-instructions.s23
3 files changed, 85 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/octeon.ll b/llvm/test/CodeGen/Mips/octeon.ll
new file mode 100644
index 00000000000..092938a6b5c
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/octeon.ll
@@ -0,0 +1,15 @@
+; RUN: llc -O1 < %s -march=mips64 -mcpu=octeon | FileCheck %s -check-prefix=OCTEON
+; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=MIPS64
+
+define i64 @mul(i64 %a, i64 %b) nounwind {
+entry:
+; OCTEON-LABEL: mul:
+; OCTEON: jr $ra
+; OCTEON: dmul $2, $4, $5
+; MIPS64-LABEL: mul:
+; MIPS64: dmult
+; MIPS64: jr
+; MIPS64: mflo
+ %res = mul i64 %a, %b
+ ret i64 %res
+}
diff --git a/llvm/test/CodeGen/Mips/octeon_popcnt.ll b/llvm/test/CodeGen/Mips/octeon_popcnt.ll
new file mode 100644
index 00000000000..52c37f69d02
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/octeon_popcnt.ll
@@ -0,0 +1,47 @@
+; RUN: llc -O1 -march=mips64 -mcpu=octeon < %s | FileCheck %s -check-prefix=OCTEON
+; RUN: llc -O1 -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=MIPS64
+
+define i8 @cnt8(i8 %x) nounwind readnone {
+ %cnt = tail call i8 @llvm.ctpop.i8(i8 %x)
+ ret i8 %cnt
+; OCTEON-LABEL: cnt8:
+; OCTEON: jr $ra
+; OCTEON: pop $2, $1
+; MIPS64-LABEL: cnt8:
+; MIPS64-NOT: pop
+}
+
+define i16 @cnt16(i16 %x) nounwind readnone {
+ %cnt = tail call i16 @llvm.ctpop.i16(i16 %x)
+ ret i16 %cnt
+; OCTEON-LABEL: cnt16:
+; OCTEON: jr $ra
+; OCTEON: pop $2, $1
+; MIPS64-LABEL: cnt16:
+; MIPS64-NOT: pop
+}
+
+define i32 @cnt32(i32 %x) nounwind readnone {
+ %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
+ ret i32 %cnt
+; OCTEON-LABEL: cnt32:
+; OCTEON: jr $ra
+; OCTEON: pop $2, $4
+; MIPS64-LABEL: cnt32:
+; MIPS64-NOT: pop
+}
+
+define i64 @cnt64(i64 %x) nounwind readnone {
+ %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
+ ret i64 %cnt
+; OCTEON-LABEL: cnt64:
+; OCTEON: jr $ra
+; OCTEON: dpop $2, $4
+; MIPS64-LABEL: cnt64:
+; MIPS64-NOT: dpop
+}
+
+declare i8 @llvm.ctpop.i8(i8) nounwind readnone
+declare i16 @llvm.ctpop.i16(i16) nounwind readnone
+declare i32 @llvm.ctpop.i32(i32) nounwind readnone
+declare i64 @llvm.ctpop.i64(i64) nounwind readnone
diff --git a/llvm/test/MC/Mips/octeon-instructions.s b/llvm/test/MC/Mips/octeon-instructions.s
new file mode 100644
index 00000000000..7da582916fc
--- /dev/null
+++ b/llvm/test/MC/Mips/octeon-instructions.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=octeon | FileCheck %s
+
+# CHECK: baddu $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x28]
+# CHECK: baddu $17, $18, $19 # encoding: [0x72,0x53,0x88,0x28]
+# CHECK: dmul $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x03]
+# CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03]
+# CHECK: dpop $9, $6 # encoding: [0x70,0xc0,0x48,0x2d]
+# CHECK: dpop $15, $22 # encoding: [0x72,0xc0,0x78,0x2d]
+# CHECK: pop $9, $6 # encoding: [0x70,0xc0,0x48,0x2c]
+# CHECK: pop $8, $19 # encoding: [0x72,0x60,0x40,0x2c]
+# CHECK: seq $25, $23, $24 # encoding: [0x72,0xf8,0xc8,0x2a]
+# CHECK: sne $25, $23, $24 # encoding: [0x72,0xf8,0xc8,0x2b]
+
+ baddu $9, $6, $7
+ baddu $17, $18, $19
+ dmul $9, $6, $7
+ dmul $19, $24, $25
+ dpop $9, $6
+ dpop $15, $22
+ pop $9, $6
+ pop $8, $19
+ seq $25, $23, $24
+ sne $25, $23, $24
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