diff options
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/SPARC/basictest.ll | 48 | ||||
-rw-r--r-- | llvm/test/MC/Disassembler/Sparc/sparc.txt | 15 | ||||
-rw-r--r-- | llvm/test/MC/Sparc/sparc-special-registers.s | 17 |
3 files changed, 80 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SPARC/basictest.ll b/llvm/test/CodeGen/SPARC/basictest.ll index 68f7c367203..7b540074a35 100644 --- a/llvm/test/CodeGen/SPARC/basictest.ll +++ b/llvm/test/CodeGen/SPARC/basictest.ll @@ -36,3 +36,51 @@ entry: ret i32 0 } +; CHECK-LABEL: signed_divide: +; CHECK: sra %o0, 31, %o2 +; CHECK: wr %o2, %g0, %y +; CHECK: sdiv %o0, %o1, %o0 +define i32 @signed_divide(i32 %a, i32 %b) { + %r = sdiv i32 %a, %b + ret i32 %r +} + +; CHECK-LABEL: unsigned_divide: +; CHECK: wr %g0, %g0, %y +; CHECK: udiv %o0, %o1, %o0 +define i32 @unsigned_divide(i32 %a, i32 %b) { + %r = udiv i32 %a, %b + ret i32 %r +} + +; CHECK-LABEL: multiply_32x32: +; CHECK: smul %o0, %o1, %o0 +define i32 @multiply_32x32(i32 %a, i32 %b) { + %r = mul i32 %a, %b + ret i32 %r +} + +; CHECK-LABEL: signed_multiply_32x32_64: +; CHECK: smul %o0, %o1, %o1 +; CHECK: rd %y, %o0 +define i64 @signed_multiply_32x32_64(i32 %a, i32 %b) { + %xa = sext i32 %a to i64 + %xb = sext i32 %b to i64 + %r = mul i64 %xa, %xb + ret i64 %r +} + +; CHECK-LABEL: unsigned_multiply_32x32_64: +; CHECK: umul %o0, %o1, %o2 +; CHECK: rd %y, %o2 +;FIXME: the smul in the output is totally redundant and should not there. +; CHECK: smul %o0, %o1, %o1 +; CHECK: retl +; CHECK: mov %o2, %o0 +define i64 @unsigned_multiply_32x32_64(i32 %a, i32 %b) { + %xa = zext i32 %a to i64 + %xb = zext i32 %b to i64 + %r = mul i64 %xa, %xb + ret i64 %r +} + diff --git a/llvm/test/MC/Disassembler/Sparc/sparc.txt b/llvm/test/MC/Disassembler/Sparc/sparc.txt index a9420246361..038aef53d51 100644 --- a/llvm/test/MC/Disassembler/Sparc/sparc.txt +++ b/llvm/test/MC/Disassembler/Sparc/sparc.txt @@ -200,3 +200,18 @@ # CHECK: rett %i7+8 0x81 0xcf 0xe0 0x08 + +# CHECK: rd %y, %i0 +0xb1 0x40 0x00 0x00 + +# CHECK: rd %asr1, %i0 +0xb1 0x40 0x40 0x00 + +# CHECK: wr %i0, 5, %y +0x81 0x86 0x20 0x05 + +# CHECK: wr %i0, %i1, %asr15 +0x9f 0x86 0x00 0x19 + +# CHECK: stbar +0x81 0x43 0xc0 0x00 diff --git a/llvm/test/MC/Sparc/sparc-special-registers.s b/llvm/test/MC/Sparc/sparc-special-registers.s new file mode 100644 index 00000000000..74e4fc6350b --- /dev/null +++ b/llvm/test/MC/Sparc/sparc-special-registers.s @@ -0,0 +1,17 @@ +! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s +! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s + + ! CHECK: rd %y, %i0 ! encoding: [0xb1,0x40,0x00,0x00] + rd %y, %i0 + + ! CHECK: rd %asr1, %i0 ! encoding: [0xb1,0x40,0x40,0x00] + rd %asr1, %i0 + + ! CHECK: wr %i0, 5, %y ! encoding: [0x81,0x86,0x20,0x05] + wr %i0, 5, %y + + ! CHECK: wr %i0, %i1, %asr15 ! encoding: [0x9f,0x86,0x00,0x19] + wr %i0, %i1, %asr15 + + ! CHECK: rd %asr15, %g0 ! encoding: [0x81,0x43,0xc0,0x00] + rd %asr15, %g0 |